Lines Matching +full:ide +full:- +full:port

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * (c) 1996-1998 Grant R. Guenther <[email protected]>
5 * frpw.c is a low-level protocol driver for the Freecom "Power" parallel port
6 * IDE adapter.
27 * cont = 0 - access the IDE register file
28 * cont = 1 - access the IDE command set
61 switch (pi->mode) { in frpw_read_block_int()
79 ph = 2 - ph; in frpw_read_block_int()
94 for (k = 0; k < count - 2; k++) in frpw_read_block_int()
97 buf[count - 2] = r4(); in frpw_read_block_int()
98 buf[count - 1] = r4(); in frpw_read_block_int()
104 for (k = 0; k < count / 2 - 1; k++) in frpw_read_block_int()
107 buf[count - 2] = r4(); in frpw_read_block_int()
108 buf[count - 1] = r4(); in frpw_read_block_int()
114 for (k = 0; k < count / 4 - 1; k++) in frpw_read_block_int()
116 buf[count - 4] = r4(); in frpw_read_block_int()
117 buf[count - 3] = r4(); in frpw_read_block_int()
119 buf[count - 2] = r4(); in frpw_read_block_int()
120 buf[count - 1] = r4(); in frpw_read_block_int()
135 switch (pi->mode) { in frpw_write_block()
172 pi->saved_r0 = r0(); in frpw_connect()
173 pi->saved_r2 = r2(); in frpw_connect()
180 w0(pi->saved_r0); in frpw_disconnect()
181 w2(pi->saved_r2); in frpw_disconnect()
185 * Stub logic to see if PNP string is available - used to distinguish
198 olddelay = pi->delay; in frpw_test_pnp()
199 pi->delay = 10; in frpw_test_pnp()
201 pi->saved_r0 = r0(); in frpw_test_pnp()
202 pi->saved_r2 = r2(); in frpw_test_pnp()
208 pi->delay = olddelay; in frpw_test_pnp()
209 w0(pi->saved_r0); in frpw_test_pnp()
210 w2(pi->saved_r2); in frpw_test_pnp()
216 * We use the pi->private to remember the result of the PNP test.
217 * To make this work, private = port*2 + chip. Yes, I know it's a hack :-(
225 if ((pi->private >> 1) != pi->port) in frpw_test_proto()
226 pi->private = frpw_test_pnp(pi) + 2*pi->port; in frpw_test_proto()
228 if (((pi->private & 0x1) == 0) && (pi->mode > 2)) { in frpw_test_proto()
229 dev_dbg(&pi->dev, in frpw_test_proto()
230 "frpw: Xilinx does not support mode %d\n", pi->mode); in frpw_test_proto()
234 if (((pi->private & 0x1) == 1) && (pi->mode == 2)) { in frpw_test_proto()
235 dev_dbg(&pi->dev, "frpw: ASIC does not support mode 2\n"); in frpw_test_proto()
260 dev_dbg(&pi->dev, in frpw_test_proto()
261 "frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n", in frpw_test_proto()
262 pi->port, (pi->private%2), pi->mode, e[0], e[1], r); in frpw_test_proto()
270 char *mode[6] = { "4-bit", "8-bit", "EPP", "EPP-8", "EPP-16", "EPP-32"}; in frpw_log_adapter()
272 dev_info(&pi->dev, in frpw_log_adapter()
274 ((pi->private & 0x1) == 0) ? "Xilinx" : "ASIC", in frpw_log_adapter()
275 pi->port, pi->mode, mode[pi->mode], pi->delay); in frpw_log_adapter()
297 MODULE_DESCRIPTION("Freecom Power parallel port IDE adapter protocol driver");