Lines Matching full:pi

32 static int frpw_read_regr(struct pi_adapter *pi, int cont, int regr)  in frpw_read_regr()  argument
47 static void frpw_write_regr(struct pi_adapter *pi, int cont, int regr, int val) in frpw_write_regr() argument
56 static void frpw_read_block_int(struct pi_adapter *pi, char *buf, int count, in frpw_read_block_int() argument
61 switch (pi->mode) { in frpw_read_block_int()
126 static void frpw_read_block(struct pi_adapter *pi, char *buf, int count) in frpw_read_block() argument
128 frpw_read_block_int(pi, buf, count, 0x08); in frpw_read_block()
131 static void frpw_write_block(struct pi_adapter *pi, char *buf, int count) in frpw_write_block() argument
135 switch (pi->mode) { in frpw_write_block()
170 static void frpw_connect(struct pi_adapter *pi) in frpw_connect() argument
172 pi->saved_r0 = r0(); in frpw_connect()
173 pi->saved_r2 = r2(); in frpw_connect()
177 static void frpw_disconnect(struct pi_adapter *pi) in frpw_disconnect() argument
180 w0(pi->saved_r0); in frpw_disconnect()
181 w2(pi->saved_r2); in frpw_disconnect()
189 static int frpw_test_pnp(struct pi_adapter *pi) in frpw_test_pnp() argument
198 olddelay = pi->delay; in frpw_test_pnp()
199 pi->delay = 10; in frpw_test_pnp()
201 pi->saved_r0 = r0(); in frpw_test_pnp()
202 pi->saved_r2 = r2(); in frpw_test_pnp()
208 pi->delay = olddelay; in frpw_test_pnp()
209 w0(pi->saved_r0); in frpw_test_pnp()
210 w2(pi->saved_r2); in frpw_test_pnp()
216 * We use the pi->private to remember the result of the PNP test.
219 static int frpw_test_proto(struct pi_adapter *pi) in frpw_test_proto() argument
225 if ((pi->private >> 1) != pi->port) in frpw_test_proto()
226 pi->private = frpw_test_pnp(pi) + 2*pi->port; in frpw_test_proto()
228 if (((pi->private & 0x1) == 0) && (pi->mode > 2)) { in frpw_test_proto()
229 dev_dbg(&pi->dev, in frpw_test_proto()
230 "frpw: Xilinx does not support mode %d\n", pi->mode); in frpw_test_proto()
234 if (((pi->private & 0x1) == 1) && (pi->mode == 2)) { in frpw_test_proto()
235 dev_dbg(&pi->dev, "frpw: ASIC does not support mode 2\n"); in frpw_test_proto()
239 frpw_connect(pi); in frpw_test_proto()
241 frpw_write_regr(pi, 0, 6, 0xa0 + j * 0x10); in frpw_test_proto()
243 frpw_write_regr(pi, 0, 2, k ^ 0xaa); in frpw_test_proto()
244 frpw_write_regr(pi, 0, 3, k ^ 0x55); in frpw_test_proto()
245 if (frpw_read_regr(pi, 0, 2) != (k ^ 0xaa)) in frpw_test_proto()
249 frpw_disconnect(pi); in frpw_test_proto()
251 frpw_connect(pi); in frpw_test_proto()
252 frpw_read_block_int(pi, scratch, 512, 0x10); in frpw_test_proto()
258 frpw_disconnect(pi); in frpw_test_proto()
260 dev_dbg(&pi->dev, in frpw_test_proto()
262 pi->port, (pi->private%2), pi->mode, e[0], e[1], r); in frpw_test_proto()
267 static void frpw_log_adapter(struct pi_adapter *pi) in frpw_log_adapter() argument
272 dev_info(&pi->dev, in frpw_log_adapter()
274 ((pi->private & 0x1) == 0) ? "Xilinx" : "ASIC", in frpw_log_adapter()
275 pi->port, pi->mode, mode[pi->mode], pi->delay); in frpw_log_adapter()