Lines Matching +full:1 +full:- +full:512

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * (c) 1997-1998 Grant R. Guenther <[email protected]>
5 * epia.c is a low-level protocol driver for Shuttle Technologies
22 * mode codes: 0 nybble reads on port 1, 8-bit writes
23 * 1 5/3 reads on ports 1 & 2, 8-bit writes
24 * 2 8-bit reads and writes
25 * 3 8-bit EPP mode
26 * 4 16-bit EPP
27 * 5 32-bit EPP
35 * cont = 1 IDE control registers
45 switch (pi->mode) { in epia_read_regr()
48 w0(r); w2(1); w2(3); w0(r); in epia_read_regr()
49 a = r1(); w2(1); b = r1(); w2(4); in epia_read_regr()
51 case 1: in epia_read_regr()
53 w0(r); w2(1); w0(r & 0x37); in epia_read_regr()
59 w0(r); w2(1); w2(0X21); w2(0x23); in epia_read_regr()
69 return -1; in epia_read_regr()
78 switch (pi->mode) { in epia_write_regr()
80 case 1: in epia_write_regr()
83 w0(r); w2(1); w0(val); w2(3); w2(4); in epia_write_regr()
98 * The use of register 0x84 is entirely unclear - it seems to control
100 * sizes: the standard 512 byte reads and writes, 12 byte writes and
105 pi->saved_r0 = r0(); in epia_connect()
106 pi->saved_r2 = r2(); in epia_connect()
109 w2(1); w2(4); in epia_connect()
110 if (pi->mode >= 3) { in epia_connect()
111 w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4); in epia_connect()
120 w0(pi->saved_r0); in epia_disconnect()
121 w2(1); w2(4); in epia_disconnect()
122 w0(pi->saved_r0); in epia_disconnect()
123 w2(pi->saved_r2); in epia_disconnect()
131 switch (pi->mode) { in epia_read_block()
133 w0(0x81); w2(1); w2(3); w0(0xc1); in epia_read_block()
134 ph = 1; in epia_read_block()
139 ph = 1 - ph; in epia_read_block()
143 case 1: in epia_read_block()
144 w0(0x91); w2(1); w0(0x10); w2(3); in epia_read_block()
146 ph = 1; in epia_read_block()
151 ph = 1 - ph; in epia_read_block()
156 w0(0x89); w2(1); w2(0x23); w2(0x21); in epia_read_block()
157 ph = 1; in epia_read_block()
161 ph = 1 - ph; in epia_read_block()
166 if (count > 512) in epia_read_block()
174 if (count > 512) in epia_read_block()
182 if (count > 512) in epia_read_block()
196 switch (pi->mode) { in epia_write_block()
198 case 1: in epia_write_block()
200 w0(0xa1); w2(1); w2(3); w2(1); w2(5); in epia_write_block()
209 ph = 1 - ph; in epia_write_block()
214 if (count < 512) in epia_write_block()
215 WR(0x84, 1); in epia_write_block()
219 if (count < 512) in epia_write_block()
223 if (count < 512) in epia_write_block()
224 WR(0x84, 1); in epia_write_block()
228 if (count < 512) in epia_write_block()
232 if (count < 512) in epia_write_block()
233 WR(0x84, 1); in epia_write_block()
237 if (count < 512) in epia_write_block()
247 char scratch[512]; in epia_test_proto()
258 WR(2, 1); WR(3, 1); in epia_test_proto()
265 epia_read_block(pi, scratch, 512); in epia_test_proto()
267 if ((scratch[2 * k] & 0xff) != ((k + 1) & 0xff)) in epia_test_proto()
269 if ((scratch[2 * k + 1] & 0xff) != ((-2 - k) & 0xff)) in epia_test_proto()
275 dev_dbg(&pi->dev, "epia: port 0x%x, mode %d, test=(%d,%d,%d)\n", in epia_test_proto()
276 pi->port, pi->mode, e[0], e[1], f); in epia_test_proto()
278 return (e[0] && e[1]) || f; in epia_test_proto()
284 char *mode[6] = { "4-bit", "5/3", "8-bit", "EPP-8", "EPP-16", "EPP-32"}; in epia_log_adapter()
286 dev_info(&pi->dev, in epia_log_adapter()
288 pi->port, pi->mode, mode[pi->mode], pi->delay); in epia_log_adapter()
296 .default_delay = 1,
297 .max_units = 1,