Lines Matching +full:0 +full:x84
22 * mode codes: 0 nybble reads on port 1, 8-bit writes
30 #define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0))
31 #define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0))
34 * cont = 0 IDE register file
37 static int cont_map[2] = { 0, 0x80 };
46 case 0: in epia_read_regr()
47 r = regr ^ 0x39; in epia_read_regr()
52 r = regr ^ 0x31; in epia_read_regr()
53 w0(r); w2(1); w0(r & 0x37); in epia_read_regr()
54 w2(3); w2(5); w0(r | 0xf0); in epia_read_regr()
58 r = regr^0x29; in epia_read_regr()
59 w0(r); w2(1); w2(0X21); w2(0x23); in epia_read_regr()
65 w3(regr); w2(0x24); a = r4(); w2(4); in epia_read_regr()
79 case 0: in epia_write_regr()
82 r = regr ^ 0x19; in epia_write_regr()
88 r = regr ^ 0x40; in epia_write_regr()
94 #define WR(r, v) epia_write_regr(pi, 0, r, v)
95 #define RR(r) epia_read_regr(pi, 0, r)
98 * The use of register 0x84 is entirely unclear - it seems to control
108 w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0); in epia_connect()
111 w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4); in epia_connect()
112 w2(0x24); w2(0x26); w2(4); in epia_connect()
114 WR(0x86, 8); in epia_connect()
119 /* WR(0x84,0x10); */ in epia_disconnect()
132 case 0: in epia_read_block()
133 w0(0x81); w2(1); w2(3); w0(0xc1); in epia_read_block()
135 for (k = 0; k < count; k++) { in epia_read_block()
141 w0(0); w2(4); in epia_read_block()
144 w0(0x91); w2(1); w0(0x10); w2(3); in epia_read_block()
145 w0(0x51); w2(5); w0(0xd1); in epia_read_block()
147 for (k = 0; k < count; k++) { in epia_read_block()
153 w0(0); w2(4); in epia_read_block()
156 w0(0x89); w2(1); w2(0x23); w2(0x21); in epia_read_block()
158 for (k = 0; k < count; k++) { in epia_read_block()
159 w2(0x24 + ph); in epia_read_block()
167 WR(0x84, 3); in epia_read_block()
168 w3(0); w2(0x24); in epia_read_block()
169 for (k = 0; k < count; k++) in epia_read_block()
171 w2(4); WR(0x84, 0); in epia_read_block()
175 WR(0x84, 3); in epia_read_block()
176 w3(0); w2(0x24); in epia_read_block()
177 for (k = 0; k < count / 2; k++) in epia_read_block()
179 w2(4); WR(0x84, 0); in epia_read_block()
183 WR(0x84, 3); in epia_read_block()
184 w3(0); w2(0x24); in epia_read_block()
185 for (k = 0; k < count / 4; k++) in epia_read_block()
187 w2(4); WR(0x84, 0); in epia_read_block()
197 case 0: in epia_write_block()
200 w0(0xa1); w2(1); w2(3); w2(1); w2(5); in epia_write_block()
201 ph = 0; last = 0x8000; in epia_write_block()
202 for (k = 0; k < count; k++) { in epia_write_block()
215 WR(0x84, 1); in epia_write_block()
216 w3(0x40); in epia_write_block()
217 for (k = 0; k < count; k++) in epia_write_block()
220 WR(0x84, 0); in epia_write_block()
224 WR(0x84, 1); in epia_write_block()
225 w3(0x40); in epia_write_block()
226 for (k = 0; k < count / 2; k++) in epia_write_block()
229 WR(0x84, 0); in epia_write_block()
233 WR(0x84, 1); in epia_write_block()
234 w3(0x40); in epia_write_block()
235 for (k = 0; k < count / 4; k++) in epia_write_block()
238 WR(0x84, 0); in epia_write_block()
246 int e[2] = { 0, 0 }; in epia_test_proto()
250 for (j = 0; j < 2; j++) { in epia_test_proto()
251 WR(6, 0xa0 + j * 0x10); in epia_test_proto()
252 for (k = 0; k < 256; k++) { in epia_test_proto()
253 WR(2, k ^ 0xaa); in epia_test_proto()
254 WR(3, k ^ 0x55); in epia_test_proto()
255 if (RR(2) != (k ^ 0xaa)) in epia_test_proto()
262 f = 0; in epia_test_proto()
264 WR(0x84, 8); in epia_test_proto()
266 for (k = 0; k < 256; k++) { in epia_test_proto()
267 if ((scratch[2 * k] & 0xff) != ((k + 1) & 0xff)) in epia_test_proto()
269 if ((scratch[2 * k + 1] & 0xff) != ((-2 - k) & 0xff)) in epia_test_proto()
272 WR(0x84, 0); in epia_test_proto()
275 dev_dbg(&pi->dev, "epia: port 0x%x, mode %d, test=(%d,%d,%d)\n", in epia_test_proto()
276 pi->port, pi->mode, e[0], e[1], f); in epia_test_proto()
278 return (e[0] && e[1]) || f; in epia_test_proto()
287 "Shuttle EPIA at 0x%x, mode %d (%s), delay %d\n", in epia_log_adapter()