1 // SPDX-License-Identifier: GPL-2.0-only
21 #define DRV_NAME		"ahci-mtk"
48 	struct mtk_ahci_plat *plat = hpriv->plat_data;  in mtk_ahci_platform_resets()
51 	/* reset AXI bus and PHY part */  in mtk_ahci_platform_resets()
52 	plat->axi_rst = devm_reset_control_get_optional_exclusive(dev, "axi");  in mtk_ahci_platform_resets()
53 	if (PTR_ERR(plat->axi_rst) == -EPROBE_DEFER)  in mtk_ahci_platform_resets()
54 		return PTR_ERR(plat->axi_rst);  in mtk_ahci_platform_resets()
56 	plat->sw_rst = devm_reset_control_get_optional_exclusive(dev, "sw");  in mtk_ahci_platform_resets()
57 	if (PTR_ERR(plat->sw_rst) == -EPROBE_DEFER)  in mtk_ahci_platform_resets()
58 		return PTR_ERR(plat->sw_rst);  in mtk_ahci_platform_resets()
60 	plat->reg_rst = devm_reset_control_get_optional_exclusive(dev, "reg");  in mtk_ahci_platform_resets()
61 	if (PTR_ERR(plat->reg_rst) == -EPROBE_DEFER)  in mtk_ahci_platform_resets()
62 		return PTR_ERR(plat->reg_rst);  in mtk_ahci_platform_resets()
64 	err = reset_control_assert(plat->axi_rst);  in mtk_ahci_platform_resets()
66 		dev_err(dev, "failed to assert AXI bus\n");  in mtk_ahci_platform_resets()
70 	err = reset_control_assert(plat->sw_rst);  in mtk_ahci_platform_resets()
76 	err = reset_control_assert(plat->reg_rst);  in mtk_ahci_platform_resets()
82 	err = reset_control_deassert(plat->reg_rst);  in mtk_ahci_platform_resets()
88 	err = reset_control_deassert(plat->sw_rst);  in mtk_ahci_platform_resets()
94 	err = reset_control_deassert(plat->axi_rst);  in mtk_ahci_platform_resets()
96 		dev_err(dev, "failed to deassert AXI bus\n");  in mtk_ahci_platform_resets()
106 	struct mtk_ahci_plat *plat = hpriv->plat_data;  in mtk_ahci_parse_property()
107 	struct device_node *np = dev->of_node;  in mtk_ahci_parse_property()
110 	if (of_property_present(np, "mediatek,phy-mode")) {  in mtk_ahci_parse_property()
111 		plat->mode = syscon_regmap_lookup_by_phandle(  in mtk_ahci_parse_property()
112 					np, "mediatek,phy-mode");  in mtk_ahci_parse_property()
113 		if (IS_ERR(plat->mode)) {  in mtk_ahci_parse_property()
114 			dev_err(dev, "missing phy-mode phandle\n");  in mtk_ahci_parse_property()
115 			return PTR_ERR(plat->mode);  in mtk_ahci_parse_property()
118 		regmap_update_bits(plat->mode, SYS_CFG, SYS_CFG_SATA_MSK,  in mtk_ahci_parse_property()
127 	struct device *dev = &pdev->dev;  in mtk_ahci_probe()
134 		return -ENOMEM;  in mtk_ahci_probe()
140 	hpriv->plat_data = plat;  in mtk_ahci_probe()
170 	{ .compatible = "mediatek,mtk-ahci", },