Lines Matching full:ahci
3 * ahci.c - AHCI SATA support
14 * AHCI hardware documentation:
32 #include <linux/ahci-remap.h>
34 #include "ahci.h"
36 #define DRV_NAME "ahci"
108 AHCI_SHT("ahci"),
305 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci_pcs_quirk }, /* PCH AHCI */
306 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci_pcs_quirk }, /* PCH AHCI */
309 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_pcs_quirk }, /* PCH M AHCI */
312 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci_pcs_quirk }, /* PCH AHCI */
313 { PCI_VDEVICE(INTEL, 0x19b0), board_ahci }, /* DNV AHCI */
314 { PCI_VDEVICE(INTEL, 0x19b1), board_ahci }, /* DNV AHCI */
315 { PCI_VDEVICE(INTEL, 0x19b2), board_ahci }, /* DNV AHCI */
316 { PCI_VDEVICE(INTEL, 0x19b3), board_ahci }, /* DNV AHCI */
317 { PCI_VDEVICE(INTEL, 0x19b4), board_ahci }, /* DNV AHCI */
318 { PCI_VDEVICE(INTEL, 0x19b5), board_ahci }, /* DNV AHCI */
319 { PCI_VDEVICE(INTEL, 0x19b6), board_ahci }, /* DNV AHCI */
320 { PCI_VDEVICE(INTEL, 0x19b7), board_ahci }, /* DNV AHCI */
321 { PCI_VDEVICE(INTEL, 0x19bE), board_ahci }, /* DNV AHCI */
322 { PCI_VDEVICE(INTEL, 0x19bF), board_ahci }, /* DNV AHCI */
323 { PCI_VDEVICE(INTEL, 0x19c0), board_ahci }, /* DNV AHCI */
324 { PCI_VDEVICE(INTEL, 0x19c1), board_ahci }, /* DNV AHCI */
325 { PCI_VDEVICE(INTEL, 0x19c2), board_ahci }, /* DNV AHCI */
326 { PCI_VDEVICE(INTEL, 0x19c3), board_ahci }, /* DNV AHCI */
327 { PCI_VDEVICE(INTEL, 0x19c4), board_ahci }, /* DNV AHCI */
328 { PCI_VDEVICE(INTEL, 0x19c5), board_ahci }, /* DNV AHCI */
329 { PCI_VDEVICE(INTEL, 0x19c6), board_ahci }, /* DNV AHCI */
330 { PCI_VDEVICE(INTEL, 0x19c7), board_ahci }, /* DNV AHCI */
331 { PCI_VDEVICE(INTEL, 0x19cE), board_ahci }, /* DNV AHCI */
332 { PCI_VDEVICE(INTEL, 0x19cF), board_ahci }, /* DNV AHCI */
333 { PCI_VDEVICE(INTEL, 0x1c02), board_ahci_pcs_quirk }, /* CPT AHCI */
334 { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_pcs_quirk }, /* CPT M AHCI */
339 { PCI_VDEVICE(INTEL, 0x1d02), board_ahci_pcs_quirk }, /* PBG AHCI */
342 { PCI_VDEVICE(INTEL, 0x2323), board_ahci_pcs_quirk }, /* DH89xxCC AHCI */
343 { PCI_VDEVICE(INTEL, 0x1e02), board_ahci_pcs_quirk }, /* Panther Point AHCI */
344 { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_pcs_quirk }, /* Panther M AHCI */
350 { PCI_VDEVICE(INTEL, 0x8c02), board_ahci_pcs_quirk }, /* Lynx Point AHCI */
351 { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_pcs_quirk }, /* Lynx M AHCI */
358 { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_pcs_quirk }, /* Lynx LP AHCI */
359 { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_pcs_quirk }, /* Lynx LP AHCI */
366 { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_pcs_quirk }, /* Cannon Lake PCH-LP AHCI */
367 { PCI_VDEVICE(INTEL, 0x1f22), board_ahci_pcs_quirk }, /* Avoton AHCI */
368 { PCI_VDEVICE(INTEL, 0x1f23), board_ahci_pcs_quirk }, /* Avoton AHCI */
375 { PCI_VDEVICE(INTEL, 0x1f32), board_ahci_avn }, /* Avoton AHCI */
376 { PCI_VDEVICE(INTEL, 0x1f33), board_ahci_avn }, /* Avoton AHCI */
383 { PCI_VDEVICE(INTEL, 0x2823), board_ahci_pcs_quirk }, /* Wellsburg/Lewisburg AHCI*/
391 { PCI_VDEVICE(INTEL, 0x8d02), board_ahci_pcs_quirk }, /* Wellsburg AHCI */
395 { PCI_VDEVICE(INTEL, 0x8d62), board_ahci_pcs_quirk }, /* Wellsburg AHCI */
399 { PCI_VDEVICE(INTEL, 0x23a3), board_ahci_pcs_quirk }, /* Coleto Creek AHCI */
400 { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_pcs_quirk }, /* Wildcat LP AHCI */
404 { PCI_VDEVICE(INTEL, 0x8c82), board_ahci_pcs_quirk }, /* 9 Series AHCI */
405 { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_pcs_quirk }, /* 9 Series M AHCI */
412 { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_pcs_quirk }, /* Sunrise LP AHCI */
415 { PCI_VDEVICE(INTEL, 0xa102), board_ahci_pcs_quirk }, /* Sunrise Point-H AHCI */
416 { PCI_VDEVICE(INTEL, 0xa103), board_ahci_pcs_quirk }, /* Sunrise M AHCI */
421 { PCI_VDEVICE(INTEL, 0xa182), board_ahci_pcs_quirk }, /* Lewisburg AHCI*/
425 { PCI_VDEVICE(INTEL, 0xa202), board_ahci_pcs_quirk }, /* Lewisburg AHCI*/
432 { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_pcs_quirk }, /* Bay Trail AHCI */
433 { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_pcs_quirk_no_devslp }, /* Bay Trail AHCI */
434 { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_pcs_quirk }, /* Cherry Tr. AHCI */
435 { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_pcs_quirk }, /* ApolloLake AHCI */
436 { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_pcs_quirk }, /* Ice Lake LP AHCI */
437 { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_pcs_quirk }, /* Comet Lake PCH-U AHCI */
440 { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_pcs_quirk }, /* Elkhart Lake AHCI */
445 /* JMicron 362B and 362C have an AHCI function with IDE class code */
466 { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
469 /* AMD is using RAID class only for ahci controllers */
614 { PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
643 /* Generic, PCI class code for AHCI */
673 MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
684 "\"<mask>\" to apply the same mask to all AHCI controller "
687 "where <pci_dev> is the PCI ID of an AHCI controller in the "
770 * is asserted through the standard AHCI port in ahci_pci_save_initial_config()
779 "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); in ahci_pci_save_initial_config()
912 * reset by bouncing "port enable" in the AHCI PCS configuration
977 /* AHCI spec rev1.1 section 8.3.3: in ahci_pci_disable_interrupts()
1148 * Macbook7,1 firmware forcibly disables MCP89 AHCI and changes PCI ID when
1155 printk(KERN_INFO "ahci: enabling MCP89 AHCI mode\n"); in ahci_mcp89_apple_enable()
1189 /* only some SB600 ahci controllers can do 64bit DMA */
1665 "Switch your BIOS from RAID to AHCI mode to use them.\n"); in ahci_remap_check()
1669 * share the legacy interrupt across ahci and remapped devices. in ahci_remap_check()
1707 "ahci: MRSM is on, fallback to single MSI\n"); in ahci_init_msi()
1741 * AHCI contains a known incompatibility between LPM and hot-plug in ahci_update_initial_lpm_policy()
1743 * Management Interaction in AHCI 1.3.1. Therefore, do not enable in ahci_update_initial_lpm_policy()
1787 * isn't programmed, ahci automatically generates it from number in ahci_intel_pcs_quirk()
1826 /* The AHCI driver can only drive the SATA ports, the PATA driver in ahci_init_one()
1828 AHCI stays out of the way */ in ahci_init_one()
1832 /* Apple BIOS on MCP89 prevents us using AHCI */ in ahci_init_one()
1836 /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. in ahci_init_one()
1837 * At the moment, we can only use the AHCI mode. Let the users know in ahci_init_one()
1868 /* ICH6s share the same PCI ID for both piix and ahci in ahci_init_one()
1869 * modes. Enabling ahci mode while MAP indicates in ahci_init_one()
1875 "controller is in combined mode, can't enable AHCI mode\n"); in ahci_init_one()
1880 /* AHCI controllers often implement SFF compatible interface. in ahci_init_one()
1936 * supported on all AHCI controllers indicating NCQ in ahci_init_one()
1944 * All AHCI controllers should be forward-compatible in ahci_init_one()
1946 * conditionalized if any buggy AHCI controllers are in ahci_init_one()
2092 MODULE_DESCRIPTION("AHCI SATA low-level driver");