Lines Matching +full:0 +full:x07
17 #define CHT_WC_V1P05A_CTRL 0x6e3b
18 #define CHT_WC_V1P15_CTRL 0x6e3c
19 #define CHT_WC_V1P05A_VSEL 0x6e3d
20 #define CHT_WC_V1P15_VSEL 0x6e3e
21 #define CHT_WC_V1P8A_CTRL 0x6e56
22 #define CHT_WC_V1P8SX_CTRL 0x6e57
23 #define CHT_WC_VDDQ_CTRL 0x6e58
24 #define CHT_WC_V1P2A_CTRL 0x6e59
25 #define CHT_WC_V1P2SX_CTRL 0x6e5a
26 #define CHT_WC_V1P8A_VSEL 0x6e5b
27 #define CHT_WC_VDDQ_VSEL 0x6e5c
28 #define CHT_WC_V2P8SX_CTRL 0x6e5d
29 #define CHT_WC_V3P3A_CTRL 0x6e5e
30 #define CHT_WC_V3P3SD_CTRL 0x6e5f
31 #define CHT_WC_VSDIO_CTRL 0x6e67
32 #define CHT_WC_V3P3A_VSEL 0x6e68
33 #define CHT_WC_VPROG1A_CTRL 0x6e90
34 #define CHT_WC_VPROG1B_CTRL 0x6e91
35 #define CHT_WC_VPROG1F_CTRL 0x6e95
36 #define CHT_WC_VPROG2D_CTRL 0x6e99
37 #define CHT_WC_VPROG3A_CTRL 0x6e9a
38 #define CHT_WC_VPROG3B_CTRL 0x6e9b
39 #define CHT_WC_VPROG4A_CTRL 0x6e9c
40 #define CHT_WC_VPROG4B_CTRL 0x6e9d
41 #define CHT_WC_VPROG4C_CTRL 0x6e9e
42 #define CHT_WC_VPROG4D_CTRL 0x6e9f
43 #define CHT_WC_VPROG5A_CTRL 0x6ea0
44 #define CHT_WC_VPROG5B_CTRL 0x6ea1
45 #define CHT_WC_VPROG6A_CTRL 0x6ea2
46 #define CHT_WC_VPROG6B_CTRL 0x6ea3
47 #define CHT_WC_VPROG1A_VSEL 0x6ec0
48 #define CHT_WC_VPROG1B_VSEL 0x6ec1
49 #define CHT_WC_V1P8SX_VSEL 0x6ec2
50 #define CHT_WC_V1P2SX_VSEL 0x6ec3
51 #define CHT_WC_V1P2A_VSEL 0x6ec4
52 #define CHT_WC_VPROG1F_VSEL 0x6ec5
53 #define CHT_WC_VSDIO_VSEL 0x6ec6
54 #define CHT_WC_V2P8SX_VSEL 0x6ec7
55 #define CHT_WC_V3P3SD_VSEL 0x6ec8
56 #define CHT_WC_VPROG2D_VSEL 0x6ec9
57 #define CHT_WC_VPROG3A_VSEL 0x6eca
58 #define CHT_WC_VPROG3B_VSEL 0x6ecb
59 #define CHT_WC_VPROG4A_VSEL 0x6ecc
60 #define CHT_WC_VPROG4B_VSEL 0x6ecd
61 #define CHT_WC_VPROG4C_VSEL 0x6ece
62 #define CHT_WC_VPROG4D_VSEL 0x6ecf
63 #define CHT_WC_VPROG5A_VSEL 0x6ed0
64 #define CHT_WC_VPROG5B_VSEL 0x6ed1
65 #define CHT_WC_VPROG6A_VSEL 0x6ed2
66 #define CHT_WC_VPROG6B_VSEL 0x6ed3
75 .address = 0x0,
77 .bit = 0x01,
80 .address = 0x04,
82 .bit = 0x07,
85 .address = 0x08,
87 .bit = 0x01,
90 .address = 0x0c,
92 .bit = 0x07,
95 .address = 0x10,
97 .bit = 0x07,
100 .address = 0x14,
102 .bit = 0x07,
105 .address = 0x18,
107 .bit = 0x01,
110 .address = 0x1c,
112 .bit = 0x07,
115 .address = 0x20,
117 .bit = 0x07,
120 .address = 0x24,
125 .address = 0x28,
130 .address = 0x2c,
135 .address = 0x30,
140 .address = 0x34,
142 .bit = 0x07,
145 .address = 0x38,
147 .bit = 0x07,
150 .address = 0x3c,
152 .bit = 0x07,
155 .address = 0x40,
157 .bit = 0x07,
160 .address = 0x44,
162 .bit = 0x07,
165 .address = 0x48,
167 .bit = 0x07,
170 .address = 0x4c,
172 .bit = 0x07,
175 .address = 0x50,
177 .bit = 0x07,
180 .address = 0x54,
182 .bit = 0x07,
185 .address = 0x58,
187 .bit = 0x07,
190 .address = 0x5c,
192 .bit = 0x07,
195 .address = 0x60,
197 .bit = 0x07,
200 .address = 0x64,
202 .bit = 0x07,
205 .address = 0x68,
207 .bit = 0x07,
210 .address = 0x6c,
224 *value = (data & bit) ? 1 : 0; in intel_cht_wc_pmic_get_power()
225 return 0; in intel_cht_wc_pmic_get_power()
231 return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0); in intel_cht_wc_pmic_update_power()
242 if (i2c_client_address > 0xff || reg_address > 0xff) { in intel_cht_wc_exec_mipi_pmic_seq_element()
243 dev_warn(dev, "warning addresses too big client 0x%x reg 0x%x\n", in intel_cht_wc_exec_mipi_pmic_seq_element()