1 // SPDX-License-Identifier: GPL-2.0-only
23  * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
26  * @platform_timer:	The pointer to the start of Platform Timer Structure
45 		gh->length != 0 &&  in platform_timer_valid()
46 		platform_timer + gh->length <= acpi_gtdt_desc.gtdt_end);  in platform_timer_valid()
53 	return platform_timer + gh->length;  in next_platform_timer()
64 	return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;  in is_timer_block()
72 	if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)  in is_non_secure_watchdog()
75 	return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);  in is_non_secure_watchdog()
92  * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
95  * Note: Secure state is not managed by the kernel on ARM64 systems.
96  * So we only handle the non-secure timer PPIs,
107 		return map_gt_gsi(gtdt->non_secure_el1_interrupt,  in acpi_gtdt_map_ppi()
108 				  gtdt->non_secure_el1_flags);  in acpi_gtdt_map_ppi()
110 		return map_gt_gsi(gtdt->virtual_timer_interrupt,  in acpi_gtdt_map_ppi()
111 				  gtdt->virtual_timer_flags);  in acpi_gtdt_map_ppi()
114 		return map_gt_gsi(gtdt->non_secure_el2_interrupt,  in acpi_gtdt_map_ppi()
115 				  gtdt->non_secure_el2_flags);  in acpi_gtdt_map_ppi()
117 		pr_err("Failed to map timer interrupt: invalid type.\n");  in acpi_gtdt_map_ppi()
124  * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
127  * Return: true if the timer HW state is lost when a CPU enters an idle state,
136 		return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);  in acpi_gtdt_c3stop()
139 		return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON);  in acpi_gtdt_c3stop()
142 		return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON);  in acpi_gtdt_c3stop()
152  * acpi_gtdt_init() - Get the info of GTDT table to prepare for further init.
159  * Return: 0 if success, -EINVAL if error.
170 	acpi_gtdt_desc.gtdt_end = (void *)table + table->length;  in acpi_gtdt_init()
175 	if (table->revision < 2) {  in acpi_gtdt_init()
177 			table->revision);  in acpi_gtdt_init()
181 	if (!gtdt->platform_timer_count) {  in acpi_gtdt_init()
182 		pr_debug("No Platform Timer.\n");  in acpi_gtdt_init()
186 	acpi_gtdt_desc.platform_timer = (void *)gtdt + gtdt->platform_timer_offset;  in acpi_gtdt_init()
190 	if (cnt != gtdt->platform_timer_count) {  in acpi_gtdt_init()
191 		cnt = min(cnt, gtdt->platform_timer_count);  in acpi_gtdt_init()
192 		pr_err(FW_BUG "limiting Platform Timer count to %d\n", cnt);  in acpi_gtdt_init()
213 	if (!block->timer_count) {  in gtdt_parse_timer_block()
215 		return -ENODEV;  in gtdt_parse_timer_block()
218 	if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {  in gtdt_parse_timer_block()
220 		       block->timer_count);  in gtdt_parse_timer_block()
221 		return -EINVAL;  in gtdt_parse_timer_block()
224 	timer_mem->cntctlbase = (phys_addr_t)block->block_address;  in gtdt_parse_timer_block()
226 	 * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).  in gtdt_parse_timer_block()
227 	 * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3  in gtdt_parse_timer_block()
230 	timer_mem->size = SZ_4K;  in gtdt_parse_timer_block()
232 	gtdt_frame = (void *)block + block->timer_offset;  in gtdt_parse_timer_block()
233 	if (gtdt_frame + block->timer_count != (void *)block + block->header.length)  in gtdt_parse_timer_block()
234 		return -EINVAL;  in gtdt_parse_timer_block()
237 	 * Get the GT timer Frame data for every GT Block Timer  in gtdt_parse_timer_block()
239 	for (i = 0; i < block->timer_count; i++, gtdt_frame++) {  in gtdt_parse_timer_block()
240 		if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)  in gtdt_parse_timer_block()
242 		if (gtdt_frame->frame_number >= ARCH_TIMER_MEM_MAX_FRAMES ||  in gtdt_parse_timer_block()
243 		    !gtdt_frame->base_address || !gtdt_frame->timer_interrupt)  in gtdt_parse_timer_block()
246 		frame = &timer_mem->frame[gtdt_frame->frame_number];  in gtdt_parse_timer_block()
249 		if (frame->valid)  in gtdt_parse_timer_block()
252 		frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,  in gtdt_parse_timer_block()
253 					     gtdt_frame->timer_flags);  in gtdt_parse_timer_block()
254 		if (frame->phys_irq <= 0) {  in gtdt_parse_timer_block()
255 			pr_warn("failed to map physical timer irq in frame %d.\n",  in gtdt_parse_timer_block()
256 				gtdt_frame->frame_number);  in gtdt_parse_timer_block()
260 		if (gtdt_frame->virtual_timer_interrupt) {  in gtdt_parse_timer_block()
261 			frame->virt_irq =  in gtdt_parse_timer_block()
262 				map_gt_gsi(gtdt_frame->virtual_timer_interrupt,  in gtdt_parse_timer_block()
263 					   gtdt_frame->virtual_timer_flags);  in gtdt_parse_timer_block()
264 			if (frame->virt_irq <= 0) {  in gtdt_parse_timer_block()
265 				pr_warn("failed to map virtual timer irq in frame %d.\n",  in gtdt_parse_timer_block()
266 					gtdt_frame->frame_number);  in gtdt_parse_timer_block()
270 			pr_debug("virtual timer in frame %d not implemented.\n",  in gtdt_parse_timer_block()
271 				 gtdt_frame->frame_number);  in gtdt_parse_timer_block()
274 		frame->cntbase = gtdt_frame->base_address;  in gtdt_parse_timer_block()
276 		 * The CNTBaseN frame is 4KB (register offsets 0x000 - 0xFFC).  in gtdt_parse_timer_block()
277 		 * See ARM DDI 0487A.k_iss10775, page I1-5130, Table I1-4  in gtdt_parse_timer_block()
280 		frame->size = SZ_4K;  in gtdt_parse_timer_block()
281 		frame->valid = true;  in gtdt_parse_timer_block()
288 		if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER ||  in gtdt_parse_timer_block()
289 		    gtdt_frame->frame_number >= ARCH_TIMER_MEM_MAX_FRAMES)  in gtdt_parse_timer_block()
292 		frame = &timer_mem->frame[gtdt_frame->frame_number];  in gtdt_parse_timer_block()
294 		if (frame->phys_irq > 0)  in gtdt_parse_timer_block()
295 			acpi_unregister_gsi(gtdt_frame->timer_interrupt);  in gtdt_parse_timer_block()
296 		frame->phys_irq = 0;  in gtdt_parse_timer_block()
298 		if (frame->virt_irq > 0)  in gtdt_parse_timer_block()
299 			acpi_unregister_gsi(gtdt_frame->virtual_timer_interrupt);  in gtdt_parse_timer_block()
300 		frame->virt_irq = 0;  in gtdt_parse_timer_block()
301 	} while (i-- > 0 && gtdt_frame--);  in gtdt_parse_timer_block()
303 	return -EINVAL;  in gtdt_parse_timer_block()
307  * acpi_arch_timer_mem_init() - Get the info of all GT blocks in GTDT table.
314  * Return: 0 if success, -EINVAL/-ENODEV if error.
334 		pr_info("found %d memory-mapped timer block(s).\n",  in acpi_arch_timer_mem_init()
354 		DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),  in gtdt_import_sbsa_gwdt()
355 		DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),  in gtdt_import_sbsa_gwdt()
361 		 wd->refresh_frame_address, wd->control_frame_address,  in gtdt_import_sbsa_gwdt()
362 		 wd->timer_interrupt, wd->timer_flags);  in gtdt_import_sbsa_gwdt()
364 	if (!(wd->refresh_frame_address && wd->control_frame_address)) {  in gtdt_import_sbsa_gwdt()
366 		return -EINVAL;  in gtdt_import_sbsa_gwdt()
369 	irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);  in gtdt_import_sbsa_gwdt()
373 		nr_res--;  in gtdt_import_sbsa_gwdt()
377 	 * Add a platform device named "sbsa-gwdt" to match the platform driver.  in gtdt_import_sbsa_gwdt()
378 	 * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog  in gtdt_import_sbsa_gwdt()
381 	pdev = platform_device_register_simple("sbsa-gwdt", index, res, nr_res);  in gtdt_import_sbsa_gwdt()
384 			acpi_unregister_gsi(wd->timer_interrupt);  in gtdt_import_sbsa_gwdt()
401 		return -EINVAL;  in gtdt_sbsa_gwdt_init()
409 	 * to re-initialize them with permanent mapped pointer values to let the  in gtdt_sbsa_gwdt_init()