Lines Matching +full:mmu +full:- +full:500

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2024 Intel Corporation
87 return -EIO; in host_ss_noc_qreqn_check_37xx()
97 return -EIO; in host_ss_noc_qreqn_check_40xx()
115 return -EIO; in host_ss_noc_qacceptn_check_37xx()
125 return -EIO; in host_ss_noc_qacceptn_check_40xx()
143 return -EIO; in host_ss_noc_qdeny_check_37xx()
153 return -EIO; in host_ss_noc_qdeny_check_40xx()
172 return -EIO; in top_noc_qrenqn_check_37xx()
183 return -EIO; in top_noc_qrenqn_check_40xx()
336 ndelay(500); in pwr_island_enable()
340 ndelay(500); in pwr_island_enable()
587 return -EIO; in top_noc_qacceptn_check_37xx()
598 return -EIO; in top_noc_qacceptn_check_40xx()
617 return -EIO; in top_noc_qdeny_check_37xx()
628 return -EIO; in top_noc_qdeny_check_40xx()
679 bool high = vdev->hw->pll.profiling_freq == PLL_PROFILING_FREQ_HIGH; in pwr_island_delay_set()
827 val = vdev->fw->entry_point >> 9; in soc_cpu_boot_37xx()
834 vdev->fw->entry_point == vdev->fw->cold_boot_entry_point ? "cold boot" : "resume"); in soc_cpu_boot_37xx()
844 return -EIO; in cpu_noc_qacceptn_check_40xx()
854 return -EIO; in cpu_noc_qdeny_check_40xx()
906 val64 = vdev->fw->entry_point; in soc_cpu_boot_40xx()
907 val64 <<= ffs(VPU_40XX_HOST_SS_VERIFICATION_ADDRESS_LO_IMAGE_LOCATION_MASK) - 1; in soc_cpu_boot_40xx()
932 /* Enable writing and set non-zero WDT value */ in wdt_disable_37xx()
1076 atomic_inc(&vdev->hw->firewall_irq_counter); in irq_noc_firewall_handler()
1079 atomic_read(&vdev->hw->firewall_irq_counter)); in irq_noc_firewall_handler()
1099 ivpu_dbg(vdev, IRQ, "MMU sync complete\n"); in ivpu_hw_ip_irq_handler_37xx()
1133 ivpu_dbg(vdev, IRQ, "MMU sync complete\n"); in ivpu_hw_ip_irq_handler_40xx()
1152 u32 reg_stride = VPU_37XX_CPU_SS_DOORBELL_1 - VPU_37XX_CPU_SS_DOORBELL_0; in db_set_37xx()
1160 u32 reg_stride = VPU_40XX_CPU_SS_DOORBELL_1 - VPU_40XX_CPU_SS_DOORBELL_0; in db_set_40xx()