218 static void wp_request_mtl(struct ivpu_device *vdev, struct wp_request *wp)  in wp_request_mtl()  argument
223 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_MTL_WP_REQ_PAYLOAD0, MIN_RATIO, wp->min, val);  in wp_request_mtl()
224 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_MTL_WP_REQ_PAYLOAD0, MAX_RATIO, wp->max, val);  in wp_request_mtl()
228 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_MTL_WP_REQ_PAYLOAD1, TARGET_RATIO, wp->target, val);  in wp_request_mtl()
233 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_MTL_WP_REQ_PAYLOAD2, CONFIG, wp->cfg, val);  in wp_request_mtl()
241 static void wp_request_lnl(struct ivpu_device *vdev, struct wp_request *wp)  in wp_request_lnl()  argument
246 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD0, MIN_RATIO, wp->min, val);  in wp_request_lnl()
247 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD0, MAX_RATIO, wp->max, val);  in wp_request_lnl()
251 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD1, TARGET_RATIO, wp->target, val);  in wp_request_lnl()
252 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD1, EPP, wp->epp, val);  in wp_request_lnl()
256 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD2, CONFIG, wp->cfg, val);  in wp_request_lnl()
257 	val = REG_SET_FLD_NUM(VPU_HW_BTRS_LNL_WP_REQ_PAYLOAD2, CDYN, wp->cdyn, val);  in wp_request_lnl()
265 static void wp_request(struct ivpu_device *vdev, struct wp_request *wp)  in wp_request()  argument
268 		wp_request_mtl(vdev, wp);  in wp_request()
270 		wp_request_lnl(vdev, wp);  in wp_request()
273 static int wp_request_send(struct ivpu_device *vdev, struct wp_request *wp)  in wp_request_send()  argument
283 	wp_request(vdev, wp);  in wp_request_send()
292 static void prepare_wp_request(struct ivpu_device *vdev, struct wp_request *wp, bool enable)  in prepare_wp_request()  argument
296 	wp->min = hw->pll.min_ratio;  in prepare_wp_request()
297 	wp->max = hw->pll.max_ratio;  in prepare_wp_request()
300 		wp->target = enable ? hw->pll.pn_ratio : 0;  in prepare_wp_request()
301 		wp->cfg = enable ? hw->config : 0;  in prepare_wp_request()
302 		wp->cdyn = 0;  in prepare_wp_request()
303 		wp->epp = 0;  in prepare_wp_request()
305 		wp->target = hw->pll.pn_ratio;  in prepare_wp_request()
306 		wp->cfg = enable ? PLL_CONFIG_DEFAULT : 0;  in prepare_wp_request()
307 		wp->cdyn = enable ? PLL_CDYN_DEFAULT : 0;  in prepare_wp_request()
308 		wp->epp = enable ? PLL_EPP_DEFAULT : 0;  in prepare_wp_request()
327 	struct wp_request wp;  in ivpu_hw_btrs_wp_drive()  local
335 	prepare_wp_request(vdev, &wp, enable);  in ivpu_hw_btrs_wp_drive()
338 		 pll_ratio_to_dpu_freq(vdev, wp.target) / HZ_PER_MHZ, wp.cfg, wp.epp, wp.cdyn);  in ivpu_hw_btrs_wp_drive()
340 	ret = wp_request_send(vdev, &wp);  in ivpu_hw_btrs_wp_drive()
621 		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",  in ivpu_hw_btrs_irq_handler_mtl()
676 		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",  in ivpu_hw_btrs_irq_handler_lnl()