Lines Matching full:vdev

45 static void platform_init(struct ivpu_device *vdev)  in platform_init()  argument
48 vdev->platform = IVPU_PLATFORM_SIMICS; in platform_init()
50 vdev->platform = IVPU_PLATFORM_SILICON; in platform_init()
52 ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n", in platform_init()
53 platform_to_str(vdev->platform), vdev->platform); in platform_init()
56 static void wa_init(struct ivpu_device *vdev) in wa_init() argument
58 vdev->wa.punit_disabled = ivpu_is_fpga(vdev); in wa_init()
59 vdev->wa.clear_runtime_mem = false; in wa_init()
61 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL) in wa_init()
62 vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev); in wa_init()
64 if (ivpu_device_id(vdev) == PCI_DEVICE_ID_LNL && in wa_init()
65 ivpu_revision(vdev) < IVPU_HW_IP_REV_LNL_B0) in wa_init()
66 vdev->wa.disable_clock_relinquish = true; in wa_init()
68 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in wa_init()
69 vdev->wa.wp0_during_power_up = true; in wa_init()
78 static void timeouts_init(struct ivpu_device *vdev) in timeouts_init() argument
81 vdev->timeout.boot = -1; in timeouts_init()
82 vdev->timeout.jsm = -1; in timeouts_init()
83 vdev->timeout.tdr = -1; in timeouts_init()
84 vdev->timeout.autosuspend = -1; in timeouts_init()
85 vdev->timeout.d0i3_entry_msg = -1; in timeouts_init()
86 } else if (ivpu_is_fpga(vdev)) { in timeouts_init()
87 vdev->timeout.boot = 100000; in timeouts_init()
88 vdev->timeout.jsm = 50000; in timeouts_init()
89 vdev->timeout.tdr = 2000000; in timeouts_init()
90 vdev->timeout.autosuspend = -1; in timeouts_init()
91 vdev->timeout.d0i3_entry_msg = 500; in timeouts_init()
92 vdev->timeout.state_dump_msg = 10; in timeouts_init()
93 } else if (ivpu_is_simics(vdev)) { in timeouts_init()
94 vdev->timeout.boot = 50; in timeouts_init()
95 vdev->timeout.jsm = 500; in timeouts_init()
96 vdev->timeout.tdr = 10000; in timeouts_init()
97 vdev->timeout.autosuspend = 100; in timeouts_init()
98 vdev->timeout.d0i3_entry_msg = 100; in timeouts_init()
99 vdev->timeout.state_dump_msg = 10; in timeouts_init()
101 vdev->timeout.boot = 1000; in timeouts_init()
102 vdev->timeout.jsm = 500; in timeouts_init()
103 vdev->timeout.tdr = 2000; in timeouts_init()
104 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in timeouts_init()
105 vdev->timeout.autosuspend = 10; in timeouts_init()
107 vdev->timeout.autosuspend = 100; in timeouts_init()
108 vdev->timeout.d0i3_entry_msg = 5; in timeouts_init()
109 vdev->timeout.state_dump_msg = 10; in timeouts_init()
113 static void memory_ranges_init(struct ivpu_device *vdev) in memory_ranges_init() argument
115 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) { in memory_ranges_init()
116 ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M); in memory_ranges_init()
117 ivpu_hw_range_init(&vdev->hw->ranges.user, 0x88000000, 511 * SZ_1M); in memory_ranges_init()
118 ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x180000000, SZ_2G); in memory_ranges_init()
119 ivpu_hw_range_init(&vdev->hw->ranges.dma, 0x200000000, SZ_128G); in memory_ranges_init()
121 ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M); in memory_ranges_init()
122 ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x80000000, SZ_2G); in memory_ranges_init()
123 ivpu_hw_range_init(&vdev->hw->ranges.user, 0x100000000, SZ_256G); in memory_ranges_init()
124 vdev->hw->ranges.dma = vdev->hw->ranges.user; in memory_ranges_init()
128 static int wp_enable(struct ivpu_device *vdev) in wp_enable() argument
130 return ivpu_hw_btrs_wp_drive(vdev, true); in wp_enable()
133 static int wp_disable(struct ivpu_device *vdev) in wp_disable() argument
135 return ivpu_hw_btrs_wp_drive(vdev, false); in wp_disable()
138 int ivpu_hw_power_up(struct ivpu_device *vdev) in ivpu_hw_power_up() argument
144 ret = wp_disable(vdev); in ivpu_hw_power_up()
146 ivpu_warn(vdev, "Failed to disable workpoint: %d\n", ret); in ivpu_hw_power_up()
149 ret = ivpu_hw_btrs_d0i3_disable(vdev); in ivpu_hw_power_up()
151 ivpu_warn(vdev, "Failed to disable D0I3: %d\n", ret); in ivpu_hw_power_up()
153 ret = wp_enable(vdev); in ivpu_hw_power_up()
155 ivpu_err(vdev, "Failed to enable workpoint: %d\n", ret); in ivpu_hw_power_up()
159 if (ivpu_hw_btrs_gen(vdev) >= IVPU_HW_BTRS_LNL) { in ivpu_hw_power_up()
161 ivpu_hw_btrs_clock_relinquish_disable_lnl(vdev); in ivpu_hw_power_up()
162 ivpu_hw_btrs_profiling_freq_reg_set_lnl(vdev); in ivpu_hw_power_up()
163 ivpu_hw_btrs_ats_print_lnl(vdev); in ivpu_hw_power_up()
166 ret = ivpu_hw_ip_host_ss_configure(vdev); in ivpu_hw_power_up()
168 ivpu_err(vdev, "Failed to configure host SS: %d\n", ret); in ivpu_hw_power_up()
172 ivpu_hw_ip_idle_gen_disable(vdev); in ivpu_hw_power_up()
174 ret = ivpu_hw_btrs_wait_for_clock_res_own_ack(vdev); in ivpu_hw_power_up()
176 ivpu_err(vdev, "Timed out waiting for clock resource own ACK\n"); in ivpu_hw_power_up()
180 ret = ivpu_hw_ip_pwr_domain_enable(vdev); in ivpu_hw_power_up()
182 ivpu_err(vdev, "Failed to enable power domain: %d\n", ret); in ivpu_hw_power_up()
186 ret = ivpu_hw_ip_host_ss_axi_enable(vdev); in ivpu_hw_power_up()
188 ivpu_err(vdev, "Failed to enable AXI: %d\n", ret); in ivpu_hw_power_up()
192 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_LNL) in ivpu_hw_power_up()
193 ivpu_hw_btrs_set_port_arbitration_weights_lnl(vdev); in ivpu_hw_power_up()
195 ret = ivpu_hw_ip_top_noc_enable(vdev); in ivpu_hw_power_up()
197 ivpu_err(vdev, "Failed to enable TOP NOC: %d\n", ret); in ivpu_hw_power_up()
202 static void save_d0i3_entry_timestamp(struct ivpu_device *vdev) in save_d0i3_entry_timestamp() argument
204 vdev->hw->d0i3_entry_host_ts = ktime_get_boottime(); in save_d0i3_entry_timestamp()
205 vdev->hw->d0i3_entry_vpu_ts = ivpu_hw_ip_read_perf_timer_counter(vdev); in save_d0i3_entry_timestamp()
208 int ivpu_hw_reset(struct ivpu_device *vdev) in ivpu_hw_reset() argument
212 if (ivpu_hw_btrs_ip_reset(vdev)) { in ivpu_hw_reset()
213 ivpu_err(vdev, "Failed to reset NPU IP\n"); in ivpu_hw_reset()
217 if (wp_disable(vdev)) { in ivpu_hw_reset()
218 ivpu_err(vdev, "Failed to disable workpoint\n"); in ivpu_hw_reset()
225 int ivpu_hw_power_down(struct ivpu_device *vdev) in ivpu_hw_power_down() argument
229 save_d0i3_entry_timestamp(vdev); in ivpu_hw_power_down()
231 if (!ivpu_hw_is_idle(vdev)) in ivpu_hw_power_down()
232 ivpu_warn(vdev, "NPU not idle during power down\n"); in ivpu_hw_power_down()
234 if (ivpu_hw_reset(vdev)) { in ivpu_hw_power_down()
235 ivpu_err(vdev, "Failed to reset NPU\n"); in ivpu_hw_power_down()
239 if (ivpu_hw_btrs_d0i3_enable(vdev)) { in ivpu_hw_power_down()
240 ivpu_err(vdev, "Failed to enter D0I3\n"); in ivpu_hw_power_down()
247 int ivpu_hw_init(struct ivpu_device *vdev) in ivpu_hw_init() argument
249 ivpu_hw_btrs_info_init(vdev); in ivpu_hw_init()
250 ivpu_hw_btrs_freq_ratios_init(vdev); in ivpu_hw_init()
251 memory_ranges_init(vdev); in ivpu_hw_init()
252 platform_init(vdev); in ivpu_hw_init()
253 wa_init(vdev); in ivpu_hw_init()
254 timeouts_init(vdev); in ivpu_hw_init()
255 atomic_set(&vdev->hw->firewall_irq_counter, 0); in ivpu_hw_init()
260 int ivpu_hw_boot_fw(struct ivpu_device *vdev) in ivpu_hw_boot_fw() argument
264 ivpu_hw_ip_snoop_disable(vdev); in ivpu_hw_boot_fw()
265 ivpu_hw_ip_tbu_mmu_enable(vdev); in ivpu_hw_boot_fw()
266 ret = ivpu_hw_ip_soc_cpu_boot(vdev); in ivpu_hw_boot_fw()
268 ivpu_err(vdev, "Failed to boot SOC CPU: %d\n", ret); in ivpu_hw_boot_fw()
273 void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable) in ivpu_hw_profiling_freq_drive() argument
275 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) { in ivpu_hw_profiling_freq_drive()
276 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT; in ivpu_hw_profiling_freq_drive()
281 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_HIGH; in ivpu_hw_profiling_freq_drive()
283 vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT; in ivpu_hw_profiling_freq_drive()
286 void ivpu_irq_handlers_init(struct ivpu_device *vdev) in ivpu_irq_handlers_init() argument
288 INIT_KFIFO(vdev->hw->irq.fifo); in ivpu_irq_handlers_init()
290 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) in ivpu_irq_handlers_init()
291 vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_37xx; in ivpu_irq_handlers_init()
293 vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_40xx; in ivpu_irq_handlers_init()
295 if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL) in ivpu_irq_handlers_init()
296 vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_mtl; in ivpu_irq_handlers_init()
298 vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_lnl; in ivpu_irq_handlers_init()
301 void ivpu_hw_irq_enable(struct ivpu_device *vdev) in ivpu_hw_irq_enable() argument
303 kfifo_reset(&vdev->hw->irq.fifo); in ivpu_hw_irq_enable()
304 ivpu_hw_ip_irq_enable(vdev); in ivpu_hw_irq_enable()
305 ivpu_hw_btrs_irq_enable(vdev); in ivpu_hw_irq_enable()
308 void ivpu_hw_irq_disable(struct ivpu_device *vdev) in ivpu_hw_irq_disable() argument
310 ivpu_hw_btrs_irq_disable(vdev); in ivpu_hw_irq_disable()
311 ivpu_hw_ip_irq_disable(vdev); in ivpu_hw_irq_disable()
316 struct ivpu_device *vdev = ptr; in ivpu_hw_irq_handler() local
319 ivpu_hw_btrs_global_int_disable(vdev); in ivpu_hw_irq_handler()
321 btrs_handled = ivpu_hw_btrs_irq_handler(vdev, irq); in ivpu_hw_irq_handler()
322 if (!ivpu_hw_is_idle((vdev)) || !btrs_handled) in ivpu_hw_irq_handler()
323 ip_handled = ivpu_hw_ip_irq_handler(vdev, irq); in ivpu_hw_irq_handler()
328 ivpu_hw_btrs_global_int_enable(vdev); in ivpu_hw_irq_handler()
330 if (!kfifo_is_empty(&vdev->hw->irq.fifo)) in ivpu_hw_irq_handler()