1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2020 - 2024 Intel Corporation
13 static char *platform_to_str(u32 platform)  in platform_to_str()  argument
15 	switch (platform) {  in platform_to_str()
23 		return "Invalid platform";  in platform_to_str()
48 		vdev->platform = IVPU_PLATFORM_SIMICS;  in platform_init()
50 		vdev->platform = IVPU_PLATFORM_SILICON;  in platform_init()
52 	ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n",  in platform_init()
53 		 platform_to_str(vdev->platform), vdev->platform);  in platform_init()
58 	vdev->wa.punit_disabled = ivpu_is_fpga(vdev);  in wa_init()
59 	vdev->wa.clear_runtime_mem = false;  in wa_init()
62 		vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev);  in wa_init()
66 		vdev->wa.disable_clock_relinquish = true;  in wa_init()
69 		vdev->wa.wp0_during_power_up = true;  in wa_init()
81 		vdev->timeout.boot = -1;  in timeouts_init()
82 		vdev->timeout.jsm = -1;  in timeouts_init()
83 		vdev->timeout.tdr = -1;  in timeouts_init()
84 		vdev->timeout.autosuspend = -1;  in timeouts_init()
85 		vdev->timeout.d0i3_entry_msg = -1;  in timeouts_init()
87 		vdev->timeout.boot = 100000;  in timeouts_init()
88 		vdev->timeout.jsm = 50000;  in timeouts_init()
89 		vdev->timeout.tdr = 2000000;  in timeouts_init()
90 		vdev->timeout.autosuspend = -1;  in timeouts_init()
91 		vdev->timeout.d0i3_entry_msg = 500;  in timeouts_init()
92 		vdev->timeout.state_dump_msg = 10;  in timeouts_init()
94 		vdev->timeout.boot = 50;  in timeouts_init()
95 		vdev->timeout.jsm = 500;  in timeouts_init()
96 		vdev->timeout.tdr = 10000;  in timeouts_init()
97 		vdev->timeout.autosuspend = 100;  in timeouts_init()
98 		vdev->timeout.d0i3_entry_msg = 100;  in timeouts_init()
99 		vdev->timeout.state_dump_msg = 10;  in timeouts_init()
101 		vdev->timeout.boot = 1000;  in timeouts_init()
102 		vdev->timeout.jsm = 500;  in timeouts_init()
103 		vdev->timeout.tdr = 2000;  in timeouts_init()
105 			vdev->timeout.autosuspend = 10;  in timeouts_init()
107 			vdev->timeout.autosuspend = 100;  in timeouts_init()
108 		vdev->timeout.d0i3_entry_msg = 5;  in timeouts_init()
109 		vdev->timeout.state_dump_msg = 10;  in timeouts_init()
116 		ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M);  in memory_ranges_init()
117 		ivpu_hw_range_init(&vdev->hw->ranges.user,   0x88000000, 511 * SZ_1M);  in memory_ranges_init()
118 		ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x180000000, SZ_2G);  in memory_ranges_init()
119 		ivpu_hw_range_init(&vdev->hw->ranges.dma,   0x200000000, SZ_128G);  in memory_ranges_init()
121 		ivpu_hw_range_init(&vdev->hw->ranges.global, 0x80000000, SZ_512M);  in memory_ranges_init()
122 		ivpu_hw_range_init(&vdev->hw->ranges.shave,  0x80000000, SZ_2G);  in memory_ranges_init()
123 		ivpu_hw_range_init(&vdev->hw->ranges.user,  0x100000000, SZ_256G);  in memory_ranges_init()
124 		vdev->hw->ranges.dma = vdev->hw->ranges.user;  in memory_ranges_init()
204 	vdev->hw->d0i3_entry_host_ts = ktime_get_boottime();  in save_d0i3_entry_timestamp()
205 	vdev->hw->d0i3_entry_vpu_ts = ivpu_hw_ip_read_perf_timer_counter(vdev);  in save_d0i3_entry_timestamp()
214 		ret = -EIO;  in ivpu_hw_reset()
219 		ret = -EIO;  in ivpu_hw_reset()
236 		ret = -EIO;  in ivpu_hw_power_down()
241 		ret = -EIO;  in ivpu_hw_power_down()
255 	atomic_set(&vdev->hw->firewall_irq_counter, 0);  in ivpu_hw_init()
276 		vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT;  in ivpu_hw_profiling_freq_drive()
281 		vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_HIGH;  in ivpu_hw_profiling_freq_drive()
283 		vdev->hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT;  in ivpu_hw_profiling_freq_drive()
288 	INIT_KFIFO(vdev->hw->irq.fifo);  in ivpu_irq_handlers_init()
291 		vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_37xx;  in ivpu_irq_handlers_init()
293 		vdev->hw->irq.ip_irq_handler = ivpu_hw_ip_irq_handler_40xx;  in ivpu_irq_handlers_init()
296 		vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_mtl;  in ivpu_irq_handlers_init()
298 		vdev->hw->irq.btrs_irq_handler = ivpu_hw_btrs_irq_handler_lnl;  in ivpu_irq_handlers_init()
303 	kfifo_reset(&vdev->hw->irq.fifo);  in ivpu_hw_irq_enable()
327 	/* Re-enable global interrupts to re-trigger MSI for pending interrupts */  in ivpu_hw_irq_handler()
330 	if (!kfifo_is_empty(&vdev->hw->irq.fifo))  in ivpu_hw_irq_handler()