Lines Matching full:ndev
54 static int aie2_check_protocol(struct amdxdna_dev_hdl *ndev, u32 fw_major, u32 fw_minor) in aie2_check_protocol() argument
56 struct amdxdna_dev *xdna = ndev->xdna; in aie2_check_protocol()
60 * ndev->priv->protocol_major and protocol_minor. in aie2_check_protocol()
65 if (ndev->priv->protocol_major != fw_major) { in aie2_check_protocol()
75 if (ndev->priv->protocol_minor > fw_minor) { in aie2_check_protocol()
82 static void aie2_dump_chann_info_debug(struct amdxdna_dev_hdl *ndev) in aie2_dump_chann_info_debug() argument
84 struct amdxdna_dev *xdna = ndev->xdna; in aie2_dump_chann_info_debug()
86 XDNA_DBG(xdna, "i2x tail 0x%x", ndev->mgmt_i2x.mb_tail_ptr_reg); in aie2_dump_chann_info_debug()
87 XDNA_DBG(xdna, "i2x head 0x%x", ndev->mgmt_i2x.mb_head_ptr_reg); in aie2_dump_chann_info_debug()
88 XDNA_DBG(xdna, "i2x ringbuf 0x%x", ndev->mgmt_i2x.rb_start_addr); in aie2_dump_chann_info_debug()
89 XDNA_DBG(xdna, "i2x rsize 0x%x", ndev->mgmt_i2x.rb_size); in aie2_dump_chann_info_debug()
90 XDNA_DBG(xdna, "x2i tail 0x%x", ndev->mgmt_x2i.mb_tail_ptr_reg); in aie2_dump_chann_info_debug()
91 XDNA_DBG(xdna, "x2i head 0x%x", ndev->mgmt_x2i.mb_head_ptr_reg); in aie2_dump_chann_info_debug()
92 XDNA_DBG(xdna, "x2i ringbuf 0x%x", ndev->mgmt_x2i.rb_start_addr); in aie2_dump_chann_info_debug()
93 XDNA_DBG(xdna, "x2i rsize 0x%x", ndev->mgmt_x2i.rb_size); in aie2_dump_chann_info_debug()
94 XDNA_DBG(xdna, "x2i chann index 0x%x", ndev->mgmt_chan_idx); in aie2_dump_chann_info_debug()
95 XDNA_DBG(xdna, "mailbox protocol major 0x%x", ndev->mgmt_prot_major); in aie2_dump_chann_info_debug()
96 XDNA_DBG(xdna, "mailbox protocol minor 0x%x", ndev->mgmt_prot_minor); in aie2_dump_chann_info_debug()
99 static int aie2_get_mgmt_chann_info(struct amdxdna_dev_hdl *ndev) in aie2_get_mgmt_chann_info() argument
117 ret = readx_poll_timeout(readl, SRAM_GET_ADDR(ndev, FW_ALIVE_OFF), in aie2_get_mgmt_chann_info()
122 off = AIE2_SRAM_OFF(ndev, addr); in aie2_get_mgmt_chann_info()
125 reg[i] = readl(ndev->sram_base + off + i * sizeof(u32)); in aie2_get_mgmt_chann_info()
128 XDNA_ERR(ndev->xdna, "Invalid mbox magic 0x%x", info_regs.magic); in aie2_get_mgmt_chann_info()
133 i2x = &ndev->mgmt_i2x; in aie2_get_mgmt_chann_info()
134 x2i = &ndev->mgmt_x2i; in aie2_get_mgmt_chann_info()
136 i2x->mb_head_ptr_reg = AIE2_MBOX_OFF(ndev, info_regs.i2x_head); in aie2_get_mgmt_chann_info()
137 i2x->mb_tail_ptr_reg = AIE2_MBOX_OFF(ndev, info_regs.i2x_tail); in aie2_get_mgmt_chann_info()
138 i2x->rb_start_addr = AIE2_SRAM_OFF(ndev, info_regs.i2x_buf); in aie2_get_mgmt_chann_info()
141 x2i->mb_head_ptr_reg = AIE2_MBOX_OFF(ndev, info_regs.x2i_head); in aie2_get_mgmt_chann_info()
142 x2i->mb_tail_ptr_reg = AIE2_MBOX_OFF(ndev, info_regs.x2i_tail); in aie2_get_mgmt_chann_info()
143 x2i->rb_start_addr = AIE2_SRAM_OFF(ndev, info_regs.x2i_buf); in aie2_get_mgmt_chann_info()
146 ndev->mgmt_chan_idx = info_regs.msi_id; in aie2_get_mgmt_chann_info()
147 ndev->mgmt_prot_major = info_regs.prot_major; in aie2_get_mgmt_chann_info()
148 ndev->mgmt_prot_minor = info_regs.prot_minor; in aie2_get_mgmt_chann_info()
150 ret = aie2_check_protocol(ndev, ndev->mgmt_prot_major, ndev->mgmt_prot_minor); in aie2_get_mgmt_chann_info()
153 aie2_dump_chann_info_debug(ndev); in aie2_get_mgmt_chann_info()
156 writel(0, SRAM_GET_ADDR(ndev, FW_ALIVE_OFF)); in aie2_get_mgmt_chann_info()
161 int aie2_runtime_cfg(struct amdxdna_dev_hdl *ndev, in aie2_runtime_cfg() argument
168 for (cfg = ndev->priv->rt_config; cfg->type; cfg++) { in aie2_runtime_cfg()
173 ret = aie2_set_runtime_cfg(ndev, cfg->type, value); in aie2_runtime_cfg()
175 XDNA_ERR(ndev->xdna, "Set type %d value %d failed", in aie2_runtime_cfg()
184 static int aie2_xdna_reset(struct amdxdna_dev_hdl *ndev) in aie2_xdna_reset() argument
188 ret = aie2_suspend_fw(ndev); in aie2_xdna_reset()
190 XDNA_ERR(ndev->xdna, "Suspend firmware failed"); in aie2_xdna_reset()
194 ret = aie2_resume_fw(ndev); in aie2_xdna_reset()
196 XDNA_ERR(ndev->xdna, "Resume firmware failed"); in aie2_xdna_reset()
203 static int aie2_mgmt_fw_init(struct amdxdna_dev_hdl *ndev) in aie2_mgmt_fw_init() argument
207 ret = aie2_runtime_cfg(ndev, AIE2_RT_CFG_INIT, NULL); in aie2_mgmt_fw_init()
209 XDNA_ERR(ndev->xdna, "Runtime config failed"); in aie2_mgmt_fw_init()
213 ret = aie2_assign_mgmt_pasid(ndev, 0); in aie2_mgmt_fw_init()
215 XDNA_ERR(ndev->xdna, "Can not assign PASID"); in aie2_mgmt_fw_init()
219 ret = aie2_xdna_reset(ndev); in aie2_mgmt_fw_init()
221 XDNA_ERR(ndev->xdna, "Reset firmware failed"); in aie2_mgmt_fw_init()
225 if (!ndev->async_events) in aie2_mgmt_fw_init()
228 ret = aie2_error_async_events_send(ndev); in aie2_mgmt_fw_init()
230 XDNA_ERR(ndev->xdna, "Send async events failed"); in aie2_mgmt_fw_init()
237 static int aie2_mgmt_fw_query(struct amdxdna_dev_hdl *ndev) in aie2_mgmt_fw_query() argument
241 ret = aie2_query_firmware_version(ndev, &ndev->xdna->fw_ver); in aie2_mgmt_fw_query()
243 XDNA_ERR(ndev->xdna, "query firmware version failed"); in aie2_mgmt_fw_query()
247 ret = aie2_query_aie_version(ndev, &ndev->version); in aie2_mgmt_fw_query()
249 XDNA_ERR(ndev->xdna, "Query AIE version failed"); in aie2_mgmt_fw_query()
253 ret = aie2_query_aie_metadata(ndev, &ndev->metadata); in aie2_mgmt_fw_query()
255 XDNA_ERR(ndev->xdna, "Query AIE metadata failed"); in aie2_mgmt_fw_query()
262 static void aie2_mgmt_fw_fini(struct amdxdna_dev_hdl *ndev) in aie2_mgmt_fw_fini() argument
264 if (aie2_suspend_fw(ndev)) in aie2_mgmt_fw_fini()
265 XDNA_ERR(ndev->xdna, "Suspend_fw failed"); in aie2_mgmt_fw_fini()
266 XDNA_DBG(ndev->xdna, "Firmware suspended"); in aie2_mgmt_fw_fini()
304 struct amdxdna_dev_hdl *ndev; in aie2_xrs_set_dft_dpm_level() local
308 ndev = xdna->dev_handle; in aie2_xrs_set_dft_dpm_level()
309 ndev->dft_dpm_level = dpm_level; in aie2_xrs_set_dft_dpm_level()
310 if (ndev->pw_mode != POWER_MODE_DEFAULT || ndev->dpm_level == dpm_level) in aie2_xrs_set_dft_dpm_level()
313 return ndev->priv->hw_ops.set_dpm(ndev, dpm_level); in aie2_xrs_set_dft_dpm_level()
325 struct amdxdna_dev_hdl *ndev = xdna->dev_handle; in aie2_hw_stop() local
327 if (ndev->dev_status <= AIE2_DEV_INIT) { in aie2_hw_stop()
332 aie2_mgmt_fw_fini(ndev); in aie2_hw_stop()
333 xdna_mailbox_stop_channel(ndev->mgmt_chann); in aie2_hw_stop()
334 xdna_mailbox_destroy_channel(ndev->mgmt_chann); in aie2_hw_stop()
335 ndev->mgmt_chann = NULL; in aie2_hw_stop()
336 drmm_kfree(&xdna->ddev, ndev->mbox); in aie2_hw_stop()
337 ndev->mbox = NULL; in aie2_hw_stop()
338 aie2_psp_stop(ndev->psp_hdl); in aie2_hw_stop()
339 aie2_smu_fini(ndev); in aie2_hw_stop()
342 ndev->dev_status = AIE2_DEV_INIT; in aie2_hw_stop()
348 struct amdxdna_dev_hdl *ndev = xdna->dev_handle; in aie2_hw_start() local
353 if (ndev->dev_status >= AIE2_DEV_START) { in aie2_hw_start()
365 ret = aie2_smu_init(ndev); in aie2_hw_start()
371 ret = aie2_psp_start(ndev->psp_hdl); in aie2_hw_start()
377 ret = aie2_get_mgmt_chann_info(ndev); in aie2_hw_start()
383 mbox_res.ringbuf_base = ndev->sram_base; in aie2_hw_start()
385 mbox_res.mbox_base = ndev->mbox_base; in aie2_hw_start()
386 mbox_res.mbox_size = MBOX_SIZE(ndev); in aie2_hw_start()
388 ndev->mbox = xdnam_mailbox_create(&xdna->ddev, &mbox_res); in aie2_hw_start()
389 if (!ndev->mbox) { in aie2_hw_start()
395 mgmt_mb_irq = pci_irq_vector(pdev, ndev->mgmt_chan_idx); in aie2_hw_start()
402 xdna_mailbox_intr_reg = ndev->mgmt_i2x.mb_head_ptr_reg + 4; in aie2_hw_start()
403 ndev->mgmt_chann = xdna_mailbox_create_channel(ndev->mbox, in aie2_hw_start()
404 &ndev->mgmt_x2i, in aie2_hw_start()
405 &ndev->mgmt_i2x, in aie2_hw_start()
408 if (!ndev->mgmt_chann) { in aie2_hw_start()
414 ret = aie2_pm_init(ndev); in aie2_hw_start()
420 ret = aie2_mgmt_fw_init(ndev); in aie2_hw_start()
426 ndev->dev_status = AIE2_DEV_START; in aie2_hw_start()
431 xdna_mailbox_stop_channel(ndev->mgmt_chann); in aie2_hw_start()
432 xdna_mailbox_destroy_channel(ndev->mgmt_chann); in aie2_hw_start()
434 aie2_psp_stop(ndev->psp_hdl); in aie2_hw_start()
436 aie2_smu_fini(ndev); in aie2_hw_start()
448 struct amdxdna_dev_hdl *ndev; in aie2_init() local
454 ndev = drmm_kzalloc(&xdna->ddev, sizeof(*ndev), GFP_KERNEL); in aie2_init()
455 if (!ndev) in aie2_init()
458 ndev->priv = xdna->dev_info->dev_priv; in aie2_init()
459 ndev->xdna = xdna; in aie2_init()
461 ret = request_firmware(&fw, ndev->priv->fw_path, &pdev->dev); in aie2_init()
464 ndev->priv->fw_path, ret); in aie2_init()
475 set_bit(PSP_REG_BAR(ndev, i), &bars); in aie2_init()
492 ndev->sram_base = tbl[xdna->dev_info->sram_bar]; in aie2_init()
493 ndev->smu_base = tbl[xdna->dev_info->smu_bar]; in aie2_init()
494 ndev->mbox_base = tbl[xdna->dev_info->mbox_bar]; in aie2_init()
524 psp_conf.psp_regs[i] = tbl[PSP_REG_BAR(ndev, i)] + PSP_REG_OFF(ndev, i); in aie2_init()
525 ndev->psp_hdl = aie2m_psp_create(&xdna->ddev, &psp_conf); in aie2_init()
526 if (!ndev->psp_hdl) { in aie2_init()
531 xdna->dev_handle = ndev; in aie2_init()
539 ret = aie2_mgmt_fw_query(ndev); in aie2_init()
544 ndev->total_col = min(aie2_max_col, ndev->metadata.cols); in aie2_init()
546 xrs_cfg.clk_list.num_levels = ndev->max_dpm_level + 1; in aie2_init()
548 xrs_cfg.clk_list.cu_clk_list[i] = ndev->priv->dpm_clk_tbl[i].hclk; in aie2_init()
552 xrs_cfg.total_col = ndev->total_col; in aie2_init()
561 ret = aie2_error_async_events_alloc(ndev); in aie2_init()
567 ret = aie2_error_async_events_send(ndev); in aie2_init()
574 ret = aie2_query_firmware_version(ndev, &ndev->xdna->fw_ver); in aie2_init()
584 aie2_error_async_events_free(ndev); in aie2_init()
600 struct amdxdna_dev_hdl *ndev = xdna->dev_handle; in aie2_fini() local
603 aie2_error_async_events_free(ndev); in aie2_fini()
613 struct amdxdna_dev_hdl *ndev; in aie2_get_aie_status() local
616 ndev = xdna->dev_handle; in aie2_get_aie_status()
622 if (ndev->metadata.cols * ndev->metadata.size < status.buffer_size) { in aie2_get_aie_status()
624 status.buffer_size, ndev->metadata.cols * ndev->metadata.size); in aie2_get_aie_status()
628 ret = aie2_query_status(ndev, u64_to_user_ptr(status.buffer), in aie2_get_aie_status()
648 struct amdxdna_dev_hdl *ndev; in aie2_get_aie_metadata() local
651 ndev = xdna->dev_handle; in aie2_get_aie_metadata()
656 meta->col_size = ndev->metadata.size; in aie2_get_aie_metadata()
657 meta->cols = ndev->metadata.cols; in aie2_get_aie_metadata()
658 meta->rows = ndev->metadata.rows; in aie2_get_aie_metadata()
660 meta->version.major = ndev->metadata.version.major; in aie2_get_aie_metadata()
661 meta->version.minor = ndev->metadata.version.minor; in aie2_get_aie_metadata()
663 meta->core.row_count = ndev->metadata.core.row_count; in aie2_get_aie_metadata()
664 meta->core.row_start = ndev->metadata.core.row_start; in aie2_get_aie_metadata()
665 meta->core.dma_channel_count = ndev->metadata.core.dma_channel_count; in aie2_get_aie_metadata()
666 meta->core.lock_count = ndev->metadata.core.lock_count; in aie2_get_aie_metadata()
667 meta->core.event_reg_count = ndev->metadata.core.event_reg_count; in aie2_get_aie_metadata()
669 meta->mem.row_count = ndev->metadata.mem.row_count; in aie2_get_aie_metadata()
670 meta->mem.row_start = ndev->metadata.mem.row_start; in aie2_get_aie_metadata()
671 meta->mem.dma_channel_count = ndev->metadata.mem.dma_channel_count; in aie2_get_aie_metadata()
672 meta->mem.lock_count = ndev->metadata.mem.lock_count; in aie2_get_aie_metadata()
673 meta->mem.event_reg_count = ndev->metadata.mem.event_reg_count; in aie2_get_aie_metadata()
675 meta->shim.row_count = ndev->metadata.shim.row_count; in aie2_get_aie_metadata()
676 meta->shim.row_start = ndev->metadata.shim.row_start; in aie2_get_aie_metadata()
677 meta->shim.dma_channel_count = ndev->metadata.shim.dma_channel_count; in aie2_get_aie_metadata()
678 meta->shim.lock_count = ndev->metadata.shim.lock_count; in aie2_get_aie_metadata()
679 meta->shim.event_reg_count = ndev->metadata.shim.event_reg_count; in aie2_get_aie_metadata()
693 struct amdxdna_dev_hdl *ndev; in aie2_get_aie_version() local
695 ndev = xdna->dev_handle; in aie2_get_aie_version()
696 version.major = ndev->version.major; in aie2_get_aie_version()
697 version.minor = ndev->version.minor; in aie2_get_aie_version()
727 struct amdxdna_dev_hdl *ndev; in aie2_get_power_mode() local
729 ndev = xdna->dev_handle; in aie2_get_power_mode()
730 mode.power_mode = ndev->pw_mode; in aie2_get_power_mode()
743 struct amdxdna_dev_hdl *ndev; in aie2_get_clock_metadata() local
746 ndev = xdna->dev_handle; in aie2_get_clock_metadata()
753 clock->mp_npu_clock.freq_mhz = ndev->npuclk_freq; in aie2_get_clock_metadata()
755 clock->h_clock.freq_mhz = ndev->hclk_freq; in aie2_get_clock_metadata()