1 // SPDX-License-Identifier: GPL-2.0-or-later
13  *	Pentium Pro and Pentium-II/Xeon MP machines.
19  *		Alan Cox	:	By repeated request 8) - Total BogoMIPS report.
32  *		Martin J. Bligh	: 	Added support for multi-quad systems
86 #include <asm/intel-family.h>
88 #include <asm/spec-ctrl.h>
92 #include <asm/spec-ctrl.h>
164 	if (!--smpboot_warm_reset_vector_count) {  in smpboot_restore_warm_reset_vector()
242 	 * 32-bit specific. 64-bit reaches this code with the correct page  in start_secondary()
273 	 * synchronization state to ALIVE and spin-waits for the control CPU to  in start_secondary()
327 	if (!c->initialized)  in smp_store_cpu_info()
329 	c->cpu_index = id;  in smp_store_cpu_info()
335 	c->initialized = true;  in smp_store_cpu_info()
341 	int cpu1 = c->cpu_index, cpu2 = o->cpu_index;  in topology_same_node()
349 	int cpu1 = c->cpu_index, cpu2 = o->cpu_index;  in topology_sane()
352 		"sched: CPU #%d's %s-sibling CPU #%d is not on the same node! "  in topology_sane()
366 		int cpu1 = c->cpu_index, cpu2 = o->cpu_index;  in match_smt()
368 		if (c->topo.pkg_id == o->topo.pkg_id &&  in match_smt()
369 		    c->topo.die_id == o->topo.die_id &&  in match_smt()
370 		    c->topo.amd_node_id == o->topo.amd_node_id &&  in match_smt()
372 			if (c->topo.core_id == o->topo.core_id)  in match_smt()
375 			if ((c->topo.cu_id != 0xff) &&  in match_smt()
376 			    (o->topo.cu_id != 0xff) &&  in match_smt()
377 			    (c->topo.cu_id == o->topo.cu_id))  in match_smt()
381 	} else if (c->topo.pkg_id == o->topo.pkg_id &&  in match_smt()
382 		   c->topo.die_id == o->topo.die_id &&  in match_smt()
383 		   c->topo.core_id == o->topo.core_id) {  in match_smt()
392 	if (c->topo.pkg_id != o->topo.pkg_id || c->topo.die_id != o->topo.die_id)  in match_die()
396 		return c->topo.amd_node_id == o->topo.amd_node_id;  in match_die()
403 	int cpu1 = c->cpu_index, cpu2 = o->cpu_index;  in match_l2c()
423 	if (c->topo.pkg_id == o->topo.pkg_id)  in match_pkg()
429  * Define intel_cod_cpu[] for Intel COD (Cluster-on-Die) CPUs.
432  * match intel_cod_cpu[] has the SNC (Sub-NUMA Cluster) topology.
435  * by multiple NUMA nodes. The LLC is shared for off-package data
437  * on-package access. CPUID (the source of the information about
452 	int cpu1 = c->cpu_index, cpu2 = o->cpu_index;  in match_llc()
453 	bool intel_snc = id && id->driver_data;  in match_llc()
495  * AMD Magny-Cours, Intel Cluster-on-Die, and Intel
496  * Sub-NUMA Clustering have this.
523 	 * since the NUMA domains will auto-magically create the right spanning  in build_sched_topology()
535 	BUG_ON(i >= ARRAY_SIZE(x86_topology)-1);  in build_sched_topology()
556 		c->booted_cores = 1;  in set_cpu_sibling_map()
588 	 * topology_sibling_cpumask links to be set-up.  in set_cpu_sibling_map()
606 					c->booted_cores++;  in set_cpu_sibling_map()
613 			} else if (i != cpu && !c->booted_cores)  in set_cpu_sibling_map()
614 				c->booted_cores = cpu_data(i).booted_cores;  in set_cpu_sibling_map()
619 /* maps the cpu to the sched domain representing multi-core */
647 	pr_debug("Before bogocount - setting activated=1\n");  in impress_friends()
652  * that there should be a 10ms delay between the BSP asserting INIT
653  * and de-asserting INIT, when starting a remote processor.
657  * Cmdline "init_cpu_udelay=" is available to over-ride this delay.
818 			if (current_node > (-1))  in announce_cpu()
823 			       node_width - num_digits(node), " ", node);  in announce_cpu()
831 		pr_cont("%*s#%d", width - num_digits(cpu), " ", cpu);  in announce_cpu()
860  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
863  * ->wakeup_secondary_cpu.
867 	unsigned long start_ip = real_mode_header->trampoline_start;  in do_boot_cpu()
871 	/* If 64-bit wakeup method exists, use the 64-bit mode trampoline IP */  in do_boot_cpu()
872 	if (apic->wakeup_secondary_cpu_64)  in do_boot_cpu()
873 		start_ip = real_mode_header->trampoline_start64;  in do_boot_cpu()
875 	idle->thread.sp = (unsigned long)task_pt_regs(idle);  in do_boot_cpu()
880 		initial_stack  = idle->thread.sp;  in do_boot_cpu()
913 	 * - Use a method from the APIC driver if one defined, with wakeup  in do_boot_cpu()
914 	 *   straight to 64-bit mode preferred over wakeup to RM.  in do_boot_cpu()
916 	 * - Use an INIT boot APIC message  in do_boot_cpu()
918 	if (apic->wakeup_secondary_cpu_64)  in do_boot_cpu()
919 		ret = apic->wakeup_secondary_cpu_64(apicid, start_ip);  in do_boot_cpu()
920 	else if (apic->wakeup_secondary_cpu)  in do_boot_cpu()
921 		ret = apic->wakeup_secondary_cpu(apicid, start_ip);  in do_boot_cpu()
933 	u32 apicid = apic->cpu_present_to_apicid(cpu);  in native_kick_ap()
938 	pr_debug("++++++++++++++++++++=_---CPU UP  %u\n", cpu);  in native_kick_ap()
942 		return -EINVAL;  in native_kick_ap()
947 		return -EINVAL;  in native_kick_ap()
998  * arch_disable_smp_support() - Disables SMP support for x86 at boottime
1008  * RED-PEN audit/test this more. I bet there is more state messed up here.
1172 			cpu_data(sibling).booted_cores--;  in remove_siblinginfo()
1193 	c->topo.core_id = 0;  in remove_siblinginfo()
1194 	c->booted_cores = 0;  in remove_siblinginfo()
1300 			(highest_subcstate - 1);  in mwait_play_dead()
1304 	md->status = CPUDEAD_MWAIT_WAIT;  in mwait_play_dead()
1305 	md->control = CPUDEAD_MWAIT_WAIT;  in mwait_play_dead()
1314 		 * The WBINVD is insufficient due to the spurious-wakeup  in mwait_play_dead()
1324 		if (READ_ONCE(md->control) == CPUDEAD_MWAIT_KEXEC_HLT) {  in mwait_play_dead()
1337 			WRITE_ONCE(md->status, CPUDEAD_MWAIT_KEXEC_HLT);  in mwait_play_dead()
1358 		if (READ_ONCE(md->status) != CPUDEAD_MWAIT_WAIT)  in smp_kick_mwait_play_dead()
1362 		for (i = 0; READ_ONCE(md->status) != newstate && i < 1000; i++) {  in smp_kick_mwait_play_dead()
1364 			WRITE_ONCE(md->control, newstate);  in smp_kick_mwait_play_dead()
1368 		if (READ_ONCE(md->status) != newstate)  in smp_kick_mwait_play_dead()
1402 	return -ENOSYS;  in native_cpu_disable()