1 // SPDX-License-Identifier: GPL-2.0
57 /* Linux non-storm CMCI threshold (may be overridden by BIOS) */
61  * MCi_CTL2 threshold for each bank when there is no storm.
67  * High threshold to limit CMCI rate during storms. Max supported is
70  * A high threshold is used instead of just disabling CMCI for a
72  * in the same bank and signalled with CMCI. The threshold only applies
78 static bool cmci_supported(int *banks)  in cmci_supported()
134  * Set a new CMCI threshold value. Preserve the state of the
138 static void cmci_set_threshold(int bank, int thresh)  in cmci_set_threshold()
150 void mce_intel_handle_storm(int bank, bool on)  in mce_intel_handle_storm()
161  * This could in theory increase the threshold under high load,
176 static bool cmci_skip_bank(int bank, u64 *val)  in cmci_skip_bank()
200  * Decide which CMCI interrupt threshold to use:
203  * 2: If ignoring any threshold set by BIOS, set Linux default
204  * 3: Try to honor BIOS threshold (unless buggy BIOS set it at zero).
206 static u64 cmci_pick_threshold(u64 val, int *bios_zero_thresh)  in cmci_pick_threshold()
217 		 * but the threshold is zero, we'll try to initialize  in cmci_pick_threshold()
230 static void cmci_claim_bank(int bank, u64 val, int bios_zero_thresh, int *bios_wrong_thresh)  in cmci_claim_bank()
241 		storm->banks[bank].poll_only = true;  in cmci_claim_bank()
258 	 * had a threshold of 0. This means the BIOS has not  in cmci_claim_bank()
266 	/* Save default threshold for each bank */  in cmci_claim_bank()
277 static void cmci_discover(int banks)  in cmci_discover()
279 	int bios_wrong_thresh = 0;  in cmci_discover()
281 	int i;  in cmci_discover()
286 		int bios_zero_thresh = 0;  in cmci_discover()
310 	int banks;  in cmci_recheck()
321 static void __cmci_disable_bank(int bank)  in __cmci_disable_bank()
343 	int i;  in cmci_clear()
344 	int banks;  in cmci_clear()
356 	int banks;  in cmci_rediscover_work_func()
366 	int banks;  in cmci_rediscover()
379 	int banks;  in cmci_reenable()
384 void cmci_disable_bank(int bank)  in cmci_disable_bank()
386 	int banks;  in cmci_disable_bank()
407 	int banks;  in intel_init_cmci()
459 	switch (c->x86_vfm) {  in intel_imc_init()
488 	if ((c->x86_vfm == INTEL_HASWELL ||  in intel_filter_mce()
489 	     c->x86_vfm == INTEL_HASWELL_L ||  in intel_filter_mce()
490 	     c->x86_vfm == INTEL_BROADWELL ||  in intel_filter_mce()
491 	     c->x86_vfm == INTEL_HASWELL_G ||  in intel_filter_mce()
492 	     c->x86_vfm == INTEL_SKYLAKE_X) &&  in intel_filter_mce()
493 	    (m->bank == 0) &&  in intel_filter_mce()
494 	    ((m->status & 0xa0000000ffffffff) == 0x80000000000f0005))  in intel_filter_mce()
508 	if (!(m->status & MCI_STATUS_MISCV))  in intel_mce_usable_address()
511 	if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)  in intel_mce_usable_address()
514 	if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)  in intel_mce_usable_address()