Lines Matching refs:INTEL_ARCH_EVENT_MASK
99 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
100 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
105 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_TD_SLOTS; in is_slots_event()
443 INTEL_ARCH_EVENT_MASK)
449 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
457 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
460 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
464 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
468 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
472 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
476 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
480 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
484 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
524 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
529 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
536 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
541 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
548 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
1531 hw_event = hwc->config & INTEL_ARCH_EVENT_MASK; in intel_pmu_has_bts_period()