Lines Matching defs:cpu_hw_events
236 struct cpu_hw_events { struct
240 struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */
241 unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
242 unsigned long dirty[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
243 int enabled;
245 int n_events; /* the # of events in the below arrays */
246 int n_added; /* the # last events in the below arrays;
248 int n_txn; /* the # last events in the below arrays;
250 int n_txn_pair;
251 int n_txn_metric;
252 int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */
253 u64 tags[X86_PMC_IDX_MAX];
255 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
256 struct event_constraint *event_constraint[X86_PMC_IDX_MAX];
258 int n_excl; /* the number of exclusive events */
260 unsigned int txn_flags;
261 int is_fake;
266 struct debug_store *ds;
267 void *ds_pebs_vaddr;
268 void *ds_bts_vaddr;
269 u64 pebs_enabled;
270 int n_pebs;
271 int n_large_pebs;
272 int n_pebs_via_pt;
273 int pebs_output;
276 u64 pebs_data_cfg;
277 u64 active_pebs_data_cfg;
278 int pebs_record_size;
281 u64 fixed_ctrl_val;
282 u64 active_fixed_ctrl_val;
287 int lbr_users;
288 int lbr_pebs_users;
289 struct perf_branch_stack lbr_stack;
290 struct perf_branch_entry lbr_entries[MAX_LBR_ENTRIES];
291 u64 lbr_counters[MAX_LBR_ENTRIES]; /* branch stack extra */
292 union {
296 u64 br_sel;
297 void *last_task_ctx;
298 int last_log_id;
299 int lbr_select;
300 void *lbr_xsave;
305 u64 intel_ctrl_guest_mask;
306 u64 intel_ctrl_host_mask;
307 struct perf_guest_switch_msr guest_switch_msrs[X86_PMC_IDX_MAX];
312 u64 intel_cp_status;
318 struct intel_shared_regs *shared_regs;
322 struct event_constraint *constraint_list; /* in enable order */
323 struct intel_excl_cntrs *excl_cntrs;
324 int excl_thread_id; /* 0 or 1 */
329 u64 tfa_shadow;
335 int n_metric;
340 struct amd_nb *amd_nb;
341 int brs_active; /* BRS is enabled */
344 u64 perf_ctr_virt_mask;
345 int n_pair; /* Large increment events */
347 void *kfree_on_online[X86_PERF_KFREE_MAX];
349 struct pmu *pmu;