Lines Matching +full:ecx +full:- +full:2000
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
7 #include <asm/asm-offsets.h>
15 #include <asm/nospec-branch.h>
24 * 32-bit SYSENTER entry.
26 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
27 * on 64-bit kernels running on Intel CPUs.
32 * never happened in any of Google's Bionic versions -- it only happened
33 * in a narrow range of Intel-provided versions.
43 * ecx arg2
63 pushq $__USER_DS /* pt_regs->ss */
64 pushq $0 /* pt_regs->sp = 0 (placeholder) */
68 * off, but we need pt_regs->flags to have IF set. Second, if TS
72 pushfq /* pt_regs->flags (except IF = 0) */
73 pushq $__USER32_CS /* pt_regs->cs */
74 pushq $0 /* pt_regs->ip = 0 (placeholder) */
79 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
80 * syscall. Just in case the high bits are nonzero, zero-extend
86 pushq %rax /* pt_regs->orig_ax */
87 PUSH_AND_CLEAR_REGS rax=$-ENOSYS
99 * If TF is set, we will single-step all the way to here -- do_debug
101 * single-stepping in general. This allows us to avoid having
103 * forces us to single-step through the SYSENTER entry code.)
106 * out-of-line as an optimization: NT is unlikely to be set in the
109 * not-taken and therefore its instructions won't be fetched.
118 * single-step is ignored only for instructions inside the
137 * 32-bit SYSCALL entry.
139 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
140 * on 64-bit kernels running on AMD CPUs.
146 * - The calling convention for SYSCALL has changed several times without
149 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
153 * - Most programmers do not directly target AMD CPUs, and the 32-bit
155 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
156 * because the SYSCALL instruction in legacy/native 32-bit mode (as
160 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
166 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
167 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
174 * ecx return address
202 pushq $__USER_DS /* pt_regs->ss */
203 pushq %r8 /* pt_regs->sp */
204 pushq %r11 /* pt_regs->flags */
205 pushq $__USER32_CS /* pt_regs->cs */
206 pushq %rcx /* pt_regs->ip */
209 pushq %rax /* pt_regs->orig_ax */
210 PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS
235 movq RBX(%rsp), %rbx /* pt_regs->rbx */
236 movq RBP(%rsp), %rbp /* pt_regs->rbp */
237 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
238 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
239 addq $RAX, %rsp /* Skip r8-r15 */
240 popq %rax /* pt_regs->rax */
241 popq %rdx /* Skip pt_regs->cx */
242 popq %rdx /* pt_regs->dx */
243 popq %rsi /* pt_regs->si */
244 popq %rdi /* pt_regs->di */
249 * EIP = ECX
254 * ECX will not match pt_regs->cx, but we're returning to a vDSO
257 * R12-R15 are callee-saved, so they contain whatever was in them
259 * code. We zero R8-R10 to avoid info leaks.
261 movq RSP-ORIG_RAX(%rsp), %rsp
266 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored