Lines Matching +full:ecx +full:- +full:2000
1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <[email protected]>
9 * entry.S contains the system-call and fault low-level handling routines.
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
18 * - SYM_FUNC_START/END:Define functions in the symbol table.
19 * - idtentry: Define exception entry points.
26 #include <asm/asm-offsets.h>
40 #include <asm/nospec-branch.h>
50 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
52 * This is the only entry point used for 64-bit system calls. The
62 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
71 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
78 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
82 * When user can change pt_regs->foo always force IRET. That is because
101 pushq $__USER_DS /* pt_regs->ss */
102 pushq PER_CPU_VAR(cpu_tss_rw + TSS_sp2) /* pt_regs->sp */
103 pushq %r11 /* pt_regs->flags */
104 pushq $__USER_CS /* pt_regs->cs */
105 pushq %rcx /* pt_regs->ip */
107 pushq %rax /* pt_regs->orig_ax */
109 PUSH_AND_CLEAR_REGS rax=$-ENOSYS
125 * a completely clean 64-bit userspace context. If we're not,
149 pushq RSP-RDI(%rdi) /* RSP */
179 * Save callee-saved registers
207 /* restore callee-saved registers */
248 * -- at this point the register set should be a valid user set
284 * idtentry_body - Macro to emit code calling the C function
308 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
319 * idtentry - Macro to generate entry stubs for simple IDT entries
343 pushq $-1 /* ORIG_RAX: no syscall to restart */
348 * If coming from kernel space, create a 6-word gap to allow the
351 testb $3, CS-ORIG_RAX(%rsp)
381 * idtentry_mce_db - Macro to generate entry stubs for #MC and #DB
403 pushq $-1 /* ORIG_RAX: no syscall to restart */
409 testb $3, CS-ORIG_RAX(%rsp)
433 * idtentry_vc - Macro to generate entry stub for #VC
442 * an IST stack by switching to the task stack if coming from user-space (which
444 * entered from kernel-mode.
446 * If entered from kernel-mode the return stack is validated first, and if it is
448 * will switch to a fall-back stack (VC2) and call a special handler function.
464 testb $3, CS-ORIG_RAX(%rsp)
469 * EBX == 0 -> SWAPGS, EBX == 1 -> no SWAPGS
478 * stack if it is safe to do so. If not it switches to the VC fall-back
490 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
498 * identical to the stack in the IRET frame or the VC fall-back stack,
530 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
627 addq $8, %rsp /* skip regs->orig_ax */
636 .long .Lnative_iret - (. + 4)
643 * 64-bit mode SS:RSP on the exception stack is always valid.
646 testb $4, (SS-RIP)(%rsp)
653 * This may fault. Non-paranoid faults on return to userspace are
655 * Double-faults due to espfix64 are handled in exc_double_fault.
673 * --- top of ESPFIX stack ---
678 * RIP <-- RSP points here when we're done
679 * RAX <-- espfix_waddr points here
680 * --- bottom of ESPFIX stack ---
705 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
730 * is read-only and RSP[31:16] are preloaded with the userspace
784 * existing activation in its critical region -- if so, we pop the current
822 movl %ds, %ecx
825 movl %es, %ecx
828 movl %fs, %ecx
831 movl %gs, %ecx
846 pushq $-1 /* orig_ax = -1 => not a system call */
858 * N 0 -> SWAPGS on exit
859 * 1 -> no SWAPGS on exit
863 * R14 - old CR3
864 * R15 - old SPEC_CTRL
912 /* EBX = 1 -> kernel GSBASE active, no restore required */
916 * The kernel-enforced convention is a negative GSBASE indicates
919 movl $MSR_GS_BASE, %ecx
924 /* EBX = 0 -> SWAPGS required on exit */
943 * only on return from non-NMI IST interrupts that came
955 * N 0 -> SWAPGS on exit
956 * 1 -> no SWAPGS on exit
960 * R14 - old CR3
961 * R15 - old SPEC_CTRL
968 * to the per-CPU x86_spec_ctrl_shadow variable.
990 /* On non-FSGSBASE systems, conditionally do SWAPGS */
1037 movl %ecx, %eax /* zero extend */
1113 * stack of the previous NMI. NMI handlers are not re-entrant
1151 testb $3, CS-RIP+8(%rsp)
1171 pushq 5*8(%rdx) /* pt_regs->ss */
1172 pushq 4*8(%rdx) /* pt_regs->rsp */
1173 pushq 3*8(%rdx) /* pt_regs->flags */
1174 pushq 2*8(%rdx) /* pt_regs->cs */
1175 pushq 1*8(%rdx) /* pt_regs->rip */
1177 pushq $-1 /* pt_regs->orig_ax */
1186 * due to nesting -- we're on the normal thread stack and we're
1202 * +---------------------------------------------------------+
1208 * +---------------------------------------------------------+
1210 * +---------------------------------------------------------+
1212 * +---------------------------------------------------------+
1218 * +---------------------------------------------------------+
1224 * +---------------------------------------------------------+
1226 * +---------------------------------------------------------+
1228 * The "original" frame is used by hardware. Before re-enabling
1265 cmpl $1, -8(%rsp)
1304 leaq -10*8(%rsp), %rdx
1380 pushq -6*8(%rsp)
1391 pushq $-1 /* ORIG_RAX: no syscall to restart */
1425 /* EBX == 0 -> invoke SWAPGS */
1469 * This handles SYSCALL from 32-bit code. There is no way to program
1470 * MSRs to fully disable 32-bit SYSCALL.
1475 mov $-ENOSYS, %eax
1488 leaq -PTREGS_SIZE(%rax), %rsp
1501 * BHI_DIS_S hardware control instead. If a pre-Alder Lake part is being
1521 * This means that the stack is non-constant and ORC can't unwind it with %rsp
1531 movl $5, %ecx
1545 sub $1, %ecx