Lines Matching +full:pin +full:- +full:ctrl +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0
31 * - barcfgs : Custom Configuration of Host's 6 target BARs
32 * - irq_mask : Limit which PCI interrupts are enabled
33 * - do_reset : Force PCI Reset on startup
41 * -1 means not configured (let host driver do default setup).
50 * Limit which PCI interrupts are enabled. 0=Disable, 1=Enable. By default
65 /* Enable Debugging Configuration Space Access */
72 unsigned int ctrl; /* 0x00 Control */ member
79 unsigned int bars[6]; /* 0x20 read-only PCI BARs */
81 unsigned int ahbmst_map[16]; /* 0x40 AHB->PCI Map per AHB Master */
147 unsigned int ctrl; /* 0x00 DMA Control */ member
161 unsigned int ctrl; /* 0x00 DMA Data Control */ member
182 unsigned int ctrl; member
224 static int grpci2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in grpci2_map_irq() argument
226 struct grpci2_priv *priv = dev->bus->sysdata; in grpci2_map_irq()
231 pin = ((pin - 1) + irq_group) & 0x3; in grpci2_map_irq()
233 return priv->irq_map[pin]; in grpci2_map_irq()
244 return -EINVAL; in grpci2_cfg_r32()
255 REGSTORE(priv->regs->ctrl, (REGLOAD(priv->regs->ctrl) & ~(0xff << 16)) | in grpci2_cfg_r32()
260 REGSTORE(priv->regs->sts_cap, (STS_CFGERR | STS_CFGERRVALID)); in grpci2_cfg_r32()
262 pci_conf = (unsigned int *) (priv->pci_conf | in grpci2_cfg_r32()
269 while ((REGLOAD(priv->regs->sts_cap) & STS_CFGERRVALID) == 0) in grpci2_cfg_r32()
272 if (REGLOAD(priv->regs->sts_cap) & STS_CFGERR) { in grpci2_cfg_r32()
275 /* Bus always little endian (unaffected by byte-swapping) */ in grpci2_cfg_r32()
289 return -EINVAL; in grpci2_cfg_r16()
314 return -EINVAL; in grpci2_cfg_w32()
325 REGSTORE(priv->regs->ctrl, (REGLOAD(priv->regs->ctrl) & ~(0xff << 16)) | in grpci2_cfg_w32()
330 REGSTORE(priv->regs->sts_cap, (STS_CFGERR | STS_CFGERRVALID)); in grpci2_cfg_w32()
332 pci_conf = (unsigned int *) (priv->pci_conf | in grpci2_cfg_w32()
339 while ((REGLOAD(priv->regs->sts_cap) & STS_CFGERRVALID) == 0) in grpci2_cfg_w32()
352 return -EINVAL; in grpci2_cfg_w16()
382 unsigned int busno = bus->number; in grpci2_read_config()
401 ret = -EINVAL; in grpci2_read_config()
421 unsigned int busno = bus->number; in grpci2_write_config()
434 return -EINVAL; in grpci2_write_config()
460 irqidx = (unsigned int)data->chip_data - 1; in grpci2_mask_irq()
465 REGSTORE(priv->regs->ctrl, REGLOAD(priv->regs->ctrl) & ~(1 << irqidx)); in grpci2_mask_irq()
475 irqidx = (unsigned int)data->chip_data - 1; in grpci2_unmask_irq()
480 REGSTORE(priv->regs->ctrl, REGLOAD(priv->regs->ctrl) | (1 << irqidx)); in grpci2_unmask_irq()
508 unsigned int ctrl, sts_cap, pci_ints; in grpci2_pci_flow_irq() local
510 ctrl = REGLOAD(priv->regs->ctrl); in grpci2_pci_flow_irq()
511 sts_cap = REGLOAD(priv->regs->sts_cap); in grpci2_pci_flow_irq()
515 generic_handle_irq(priv->virq_err); in grpci2_pci_flow_irq()
520 pci_ints = ((~sts_cap) >> STS_INTSTS_BIT) & ctrl & CTRL_HOSTINT; in grpci2_pci_flow_irq()
525 generic_handle_irq(priv->irq_map[i]); in grpci2_pci_flow_irq()
535 if ((priv->irq_mode == 0) && (sts_cap & (STS_IDMA | STS_IDMAERR))) { in grpci2_pci_flow_irq()
536 generic_handle_irq(priv->virq_dma); in grpci2_pci_flow_irq()
541 * Call "first level" IRQ chip end-of-irq handler. It will ACK LEON IRQ in grpci2_pci_flow_irq()
546 desc->irq_data.chip->irq_eoi(&desc->irq_data); in grpci2_pci_flow_irq()
570 struct grpci2_regs __iomem *regs = priv->regs; in grpci2_hw_init()
572 struct grpci2_barcfg *barcfg = priv->tgtbars; in grpci2_hw_init()
575 if (priv->do_reset) { in grpci2_hw_init()
577 REGSTORE(regs->ctrl, CTRL_RESET); in grpci2_hw_init()
580 REGSTORE(regs->ctrl, 0); in grpci2_hw_init()
581 REGSTORE(regs->sts_cap, ~0); /* Clear Status */ in grpci2_hw_init()
582 REGSTORE(regs->dma_ctrl, 0); in grpci2_hw_init()
583 REGSTORE(regs->dma_bdbase, 0); in grpci2_hw_init()
586 REGSTORE(regs->io_map, REGLOAD(regs->io_map) & 0x0000ffff); in grpci2_hw_init()
588 /* set 1:1 mapping between AHB -> PCI memory space, for all Masters in grpci2_hw_init()
592 REGSTORE(regs->ahbmst_map[i], priv->pci_area); in grpci2_hw_init()
595 grpci2_cfg_r32(priv, TGT, 0, PCI_VENDOR_ID, &priv->pciid); in grpci2_hw_init()
600 /* Enable/Disable Byte twisting */ in grpci2_hw_init()
602 io_map = (io_map & ~0x1) | (priv->bt_enabled ? 1 : 0); in grpci2_hw_init()
620 bar_sz = ((pciadr - 1) & ~pciadr) + 1; in grpci2_hw_init()
638 printk(KERN_INFO " TGT BAR[%d]: 0x%08x (PCI)-> 0x%08x\n", in grpci2_hw_init()
642 /* set as bus master and enable pci memory responses */ in grpci2_hw_init()
647 /* Enable Error respone (CPU-TRAP) on illegal memory access. */ in grpci2_hw_init()
648 REGSTORE(regs->ctrl, CTRL_ER | CTRL_PE); in grpci2_hw_init()
661 struct grpci2_regs __iomem *regs = priv->regs; in grpci2_err_interrupt()
664 status = REGLOAD(regs->sts_cap); in grpci2_err_interrupt()
681 REGSTORE(regs->sts_cap, status & STS_ERR_IRQ); in grpci2_err_interrupt()
696 return -ENODEV; in grpci2_of_probe()
699 if (ofdev->num_resources < 3) { in grpci2_of_probe()
701 return -EIO; in grpci2_of_probe()
705 regs = of_ioremap(&ofdev->resource[0], 0, in grpci2_of_probe()
706 resource_size(&ofdev->resource[0]), in grpci2_of_probe()
707 "grlib-grpci2 regs"); in grpci2_of_probe()
710 return -EIO; in grpci2_of_probe()
717 capability = REGLOAD(regs->sts_cap); in grpci2_of_probe()
720 err = -EIO; in grpci2_of_probe()
726 err = -ENOMEM; in grpci2_of_probe()
729 priv->regs = regs; in grpci2_of_probe()
730 priv->irq = ofdev->archdata.irqs[0]; /* BASE IRQ */ in grpci2_of_probe()
731 priv->irq_mode = (capability & STS_IRQMODE) >> STS_IRQMODE_BIT; in grpci2_of_probe()
733 printk(KERN_INFO "GRPCI2: host found at %p, irq%d\n", regs, priv->irq); in grpci2_of_probe()
736 priv->bt_enabled = 1; in grpci2_of_probe()
739 tmp = of_get_property(ofdev->dev.of_node, "barcfg", &len); in grpci2_of_probe()
741 memcpy(priv->tgtbars, tmp, 2*4*6); in grpci2_of_probe()
743 memset(priv->tgtbars, -1, 2*4*6); in grpci2_of_probe()
746 tmp = of_get_property(ofdev->dev.of_node, "irq_mask", &len); in grpci2_of_probe()
748 priv->do_reset = *tmp; in grpci2_of_probe()
750 priv->irq_mask = 0xf; in grpci2_of_probe()
753 tmp = of_get_property(ofdev->dev.of_node, "reset", &len); in grpci2_of_probe()
755 priv->do_reset = *tmp; in grpci2_of_probe()
757 priv->do_reset = 0; in grpci2_of_probe()
760 priv->pci_area = ofdev->resource[1].start; in grpci2_of_probe()
761 priv->pci_area_end = ofdev->resource[1].end+1; in grpci2_of_probe()
762 priv->pci_io = ofdev->resource[2].start; in grpci2_of_probe()
763 priv->pci_conf = ofdev->resource[2].start + 0x10000; in grpci2_of_probe()
764 priv->pci_conf_end = priv->pci_conf + 0x10000; in grpci2_of_probe()
765 priv->pci_io_va = (unsigned long)ioremap(priv->pci_io, 0x10000); in grpci2_of_probe()
766 if (!priv->pci_io_va) { in grpci2_of_probe()
767 err = -EIO; in grpci2_of_probe()
772 "GRPCI2: MEMORY SPACE [0x%08lx - 0x%08lx]\n" in grpci2_of_probe()
773 " I/O SPACE [0x%08lx - 0x%08lx]\n" in grpci2_of_probe()
774 " CONFIG SPACE [0x%08lx - 0x%08lx]\n", in grpci2_of_probe()
775 priv->pci_area, priv->pci_area_end-1, in grpci2_of_probe()
776 priv->pci_io, priv->pci_conf-1, in grpci2_of_probe()
777 priv->pci_conf, priv->pci_conf_end-1); in grpci2_of_probe()
784 memset(&priv->info.io_space, 0, sizeof(struct resource)); in grpci2_of_probe()
785 priv->info.io_space.name = "GRPCI2 PCI I/O Space"; in grpci2_of_probe()
786 priv->info.io_space.start = priv->pci_io_va + 0x1000; in grpci2_of_probe()
787 priv->info.io_space.end = priv->pci_io_va + 0x10000 - 1; in grpci2_of_probe()
788 priv->info.io_space.flags = IORESOURCE_IO; in grpci2_of_probe()
792 * non-prefetchable memory in grpci2_of_probe()
794 memset(&priv->info.mem_space, 0, sizeof(struct resource)); in grpci2_of_probe()
795 priv->info.mem_space.name = "GRPCI2 PCI MEM Space"; in grpci2_of_probe()
796 priv->info.mem_space.start = priv->pci_area; in grpci2_of_probe()
797 priv->info.mem_space.end = priv->pci_area_end - 1; in grpci2_of_probe()
798 priv->info.mem_space.flags = IORESOURCE_MEM; in grpci2_of_probe()
800 if (request_resource(&iomem_resource, &priv->info.mem_space) < 0) in grpci2_of_probe()
802 if (request_resource(&ioport_resource, &priv->info.io_space) < 0) in grpci2_of_probe()
806 priv->info.busn.name = "GRPCI2 busn"; in grpci2_of_probe()
807 priv->info.busn.start = 0; in grpci2_of_probe()
808 priv->info.busn.end = 255; in grpci2_of_probe()
816 if (priv->irq_mode < 2) { in grpci2_of_probe()
818 leon_update_virq_handling(priv->irq, grpci2_pci_flow_irq, in grpci2_of_probe()
821 priv->irq_map[0] = grpci2_build_device_irq(1); in grpci2_of_probe()
822 priv->irq_map[1] = grpci2_build_device_irq(2); in grpci2_of_probe()
823 priv->irq_map[2] = grpci2_build_device_irq(3); in grpci2_of_probe()
824 priv->irq_map[3] = grpci2_build_device_irq(4); in grpci2_of_probe()
826 priv->virq_err = grpci2_build_device_irq(5); in grpci2_of_probe()
827 if (priv->irq_mode & 1) in grpci2_of_probe()
828 priv->virq_dma = ofdev->archdata.irqs[1]; in grpci2_of_probe()
830 priv->virq_dma = grpci2_build_device_irq(6); in grpci2_of_probe()
832 /* Enable IRQs on LEON IRQ controller */ in grpci2_of_probe()
833 err = request_irq(priv->irq, grpci2_jump_interrupt, 0, in grpci2_of_probe()
841 leon_update_virq_handling(ofdev->archdata.irqs[i], in grpci2_of_probe()
844 priv->irq_map[i] = ofdev->archdata.irqs[i]; in grpci2_of_probe()
846 priv->virq_err = priv->irq_map[0]; in grpci2_of_probe()
847 if (priv->irq_mode & 1) in grpci2_of_probe()
848 priv->virq_dma = ofdev->archdata.irqs[4]; in grpci2_of_probe()
850 priv->virq_dma = priv->irq_map[0]; in grpci2_of_probe()
853 REGSTORE(regs->ctrl, REGLOAD(regs->ctrl)|(priv->irq_mask&0xf)); in grpci2_of_probe()
856 /* Setup IRQ handler for non-configuration space access errors */ in grpci2_of_probe()
857 err = request_irq(priv->virq_err, grpci2_err_interrupt, IRQF_SHARED, in grpci2_of_probe()
865 * Enable Error Interrupts. PCI interrupts are unmasked once request_irq in grpci2_of_probe()
868 REGSTORE(regs->ctrl, REGLOAD(regs->ctrl) | CTRL_EI | CTRL_SI); in grpci2_of_probe()
871 priv->info.ops = &grpci2_ops; in grpci2_of_probe()
872 priv->info.map_irq = grpci2_map_irq; in grpci2_of_probe()
873 leon_pci_init(ofdev, &priv->info); in grpci2_of_probe()
878 release_resource(&priv->info.io_space); in grpci2_of_probe()
880 release_resource(&priv->info.mem_space); in grpci2_of_probe()
882 err = -ENOMEM; in grpci2_of_probe()
883 iounmap((void __iomem *)priv->pci_io_va); in grpci2_of_probe()
887 of_iounmap(&ofdev->resource[0], regs, in grpci2_of_probe()
888 resource_size(&ofdev->resource[0])); in grpci2_of_probe()