Lines Matching +full:64 +full:mb
7 * pointers into this table for 8K and 64K page sizes, and also a
151 * bit 23, for 8MB per PMD) we must propagate bit 22 for a
152 * 4MB huge page. For huge PUDs (which fall on bit 33, for
153 * 8GB per PUD), we have to accommodate 256MB and 2GB huge
159 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
160 srlx REG2, 64 - PAGE_SHIFT, REG2; \
164 sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
165 srlx REG2, 64 - PAGE_SHIFT, REG2; \
176 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
177 srlx REG2, 64 - PAGE_SHIFT, REG2; \
191 698: sllx VADDR, 64 - PMD_SHIFT, REG2; \
192 srlx REG2, 64 - PAGE_SHIFT, REG2; \
239 * We have to propagate the 4MB bit of the virtual address
240 * because we are fabricating 8MB pages using 4MB hw pages.
272 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
273 srlx REG2, 64 - PAGE_SHIFT, REG2; \
277 sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
278 srlx REG2, 64 - PAGE_SHIFT, REG2; \
283 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
284 srlx REG2, 64 - PAGE_SHIFT, REG2; \
288 sllx VADDR, 64 - PMD_SHIFT, REG2; \
289 srlx REG2, 64 - PAGE_SHIFT, REG2; \
323 * handle about 16MB of modules and vmalloc mappings without