Lines Matching +full:default +full:- +full:on

1 # SPDX-License-Identifier: GPL-2.0
6 	depends on !CPU_SH2
10 	default y
12 	  Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
13 	  boot on these systems, this option must not be set.
15 	  On other systems (such as the SH-3 and 4) where an MMU exists,
16 	  turning this off will boot the kernel on these machines with the
26 	  On MMU-less systems, any of these page sizes can be selected
30 	default "0x80000000" if MMU
31 	default "0x00000000"
35 	default "8" if PAGE_SIZE_16KB
36 	default "6" if PAGE_SIZE_64KB
37 	default "13" if !MMU
38 	default "10"
44 	  overriding the default setting when ability to allocate very
54 	default "0x08000000"
66 	  value on any of the known systems will only lead to disaster.
70 	default "0x04000000"
72 	  This sets the default memory size assumed by your SH kernel. It can
73 	  be overridden as normal by the 'mem=' argument on the kernel command
75 	  as 0x04000000 which was the default value before this became
86 	default !MMU
89 	bool "Support 32-bit physical addressing through PMB"
90 	depends on MMU && CPU_SH4A && !CPU_SH4AL_DSP
95 	  32-bits through the SH-4A PMB. If this is not set, legacy
96 	  29-bit physical addressing will be used.
100 	depends on (CPU_SHX2 || CPU_SHX3) && MMU
104 	depends on MMU && (CPU_SH3 || CPU_SH4)
105 	default y
113 	  (the default value) say Y.
116 	bool "Non-Uniform Memory Access (NUMA) Support"
117 	depends on MMU && SYS_SUPPORTS_NUMA
119 	default n
129 	default "3" if CPU_SUBTYPE_SHX3
130 	default "1"
131 	depends on NUMA
135 	depends on !NUMA
149        depends on X2TLB
160 	depends on HUGETLB_PAGE
161 	default HUGETLB_PAGE_SIZE_1MB if PAGE_SIZE_64KB
162 	default HUGETLB_PAGE_SIZE_64K
166 	depends on !PAGE_SIZE_64KB
170 	depends on X2TLB
177 	depends on X2TLB
181 	depends on X2TLB
186 	bool "Multi-core scheduler support"
187 	depends on SMP
188 	default y
190 	  Multi-core scheduler support improves the CPU scheduler's decision
191 	  making when dealing with multi-core CPU chips at a cost of slightly
200 	depends on CPU_SUBTYPE_SH7705
201 	default y
205 	default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4
206 	default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
209 	bool "Write-back"
212 	bool "Write-through"
214 	  Selecting this option will configure the caches in write-through
215 	  mode, as opposed to the default write-back configuration.
217 	  Since there's sill some aliasing issues on SH-4, this option will