1 // SPDX-License-Identifier: GPL-2.0
3  * arch/sh/kernel/cpu/sh4a/clock-sh7780.c
22 static void master_clk_init(struct clk *clk)  in master_clk_init()  argument
24 	clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];  in master_clk_init()
31 static unsigned long module_clk_recalc(struct clk *clk)  in module_clk_recalc()  argument
34 	return clk->parent->rate / pfc_divisors[idx];  in module_clk_recalc()
41 static unsigned long bus_clk_recalc(struct clk *clk)  in bus_clk_recalc()  argument
44 	return clk->parent->rate / bfc_divisors[idx];  in bus_clk_recalc()
51 static unsigned long cpu_clk_recalc(struct clk *clk)  in cpu_clk_recalc()  argument
54 	return clk->parent->rate / ifc_divisors[idx];  in cpu_clk_recalc()
74 static unsigned long shyway_clk_recalc(struct clk *clk)  in shyway_clk_recalc()  argument
77 	return clk->parent->rate / cfc_divisors[idx];  in shyway_clk_recalc()
84 static struct clk sh7780_shyway_clk = {
90  * Additional SH7780-specific on-chip clocks that aren't already part of the
93 static struct clk *sh7780_onchip_clocks[] = {
104 	struct clk *clk;  in arch_clk_init()  local
109 	clk = clk_get(NULL, "master_clk");  in arch_clk_init()
111 		struct clk *clkp = sh7780_onchip_clocks[i];  in arch_clk_init()
113 		clkp->parent = clk;  in arch_clk_init()
117 	clk_put(clk);  in arch_clk_init()