117 /* Emit a 4-byte riscv instruction. */
118 static inline void emit(const u32 insn, struct rv_jit_context *ctx)  in emit()  function
128 /* Emit a 2-byte riscv compressed instruction. */
787  * ensure that the RV32 JIT doesn't emit any of these instructions.
968 /* Helper functions that emit RVC instructions when possible. */
977 		emit(rv_jalr(rd, rs, imm), ctx);  in emit_jalr()
985 		emit(rv_addi(rd, rs, 0), ctx);  in emit_mv()
993 		emit(rv_add(rd, rs1, rs2), ctx);  in emit_add()
1006 		emit(rv_addi(rd, rs, imm), ctx);  in emit_addi()
1014 		emit(rv_addi(rd, RV_REG_ZERO, imm), ctx);  in emit_li()
1022 		emit(rv_lui(rd, imm), ctx);  in emit_lui()
1030 		emit(rv_slli(rd, rs, imm), ctx);  in emit_slli()
1038 		emit(rv_andi(rd, rs, imm), ctx);  in emit_andi()
1046 		emit(rv_srli(rd, rs, imm), ctx);  in emit_srli()
1054 		emit(rv_srai(rd, rs, imm), ctx);  in emit_srai()
1062 		emit(rv_sub(rd, rs1, rs2), ctx);  in emit_sub()
1070 		emit(rv_or(rd, rs1, rs2), ctx);  in emit_or()
1078 		emit(rv_and(rd, rs1, rs2), ctx);  in emit_and()
1086 		emit(rv_xor(rd, rs1, rs2), ctx);  in emit_xor()
1096 		emit(rv_lw(rd, off, rs1), ctx);  in emit_lw()
1106 		emit(rv_sw(rs1, off, rs2), ctx);  in emit_sw()
1112 		emit(rvzba_sh2add(rd, rs1, rs2), ctx);  in emit_sh2add()
1123 		emit(rvzba_sh3add(rd, rs1, rs2), ctx);  in emit_sh3add()
1139 		emit(rv_addiw(rd, rs, imm), ctx);  in emit_addiw()
1149 		emit(rv_ld(rd, off, rs1), ctx);  in emit_ld()
1159 		emit(rv_sd(rs1, off, rs2), ctx);  in emit_sd()
1167 		emit(rv_subw(rd, rs1, rs2), ctx);  in emit_subw()
1173 		emit(rvzbb_sextb(rd, rs), ctx);  in emit_sextb()
1184 		emit(rvzbb_sexth(rd, rs), ctx);  in emit_sexth()
1200 		emit(rvzbb_zexth(rd, rs), ctx);  in emit_zexth()
1211 		emit(rvzba_zextw(rd, rs), ctx);  in emit_zextw()
1224 		emit(rvzbb_rev8(rd, rd), ctx);  in emit_bswap()