Lines Matching +full:sifive +full:- +full:blocks

1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
15 // Copyright (c) 2023, Jerry Shih <jerry.shih@sifive.com>
40 // The generated code of this file depends on the following RISC-V extensions:
41 // - RV64I
42 // - RISC-V Vector ('V') with VLEN >= 128
43 // - RISC-V Vector SM3 Secure Hash extension ('Zvksh')
44 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
86 	// Load the state and endian-swap each 32-bit word.
92 	addi		NUM_BLOCKS, NUM_BLOCKS, -1
97 	// Load the next 512-bit message block into W0-W1.
116 	// Repeat if more blocks remain.