Lines Matching +full:risc +full:- +full:v
1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
40 // The generated code of this file depends on the following RISC-V extensions:
41 // - RV64I
42 // - RISC-V Vector ('V') with VLEN >= 128
43 // - RISC-V Vector SM3 Secure Hash extension ('Zvksh')
44 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
86 // Load the state and endian-swap each 32-bit word.
88 vle32.v STATE, (STATEP)
89 vrev8.v STATE, STATE
92 addi NUM_BLOCKS, NUM_BLOCKS, -1
95 vmv.v.v PREV_STATE, STATE
97 // Load the next 512-bit message block into W0-W1.
98 vle32.v W0, (DATA)
100 vle32.v W1, (DATA)
120 vrev8.v STATE, STATE
121 vse32.v STATE, (STATEP)