Lines Matching +full:sifive +full:- +full:blocks
1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
15 // Copyright (c) 2023, Phoebe Chen <phoebe.chen@sifive.com>
40 // The generated code of this file depends on the following RISC-V extensions:
41 // - RV64I
42 // - RISC-V Vector ('V') with VLEN >= 128
43 // - RISC-V Vector SHA-2 Secure Hash extension ('Zvknha' or 'Zvknhb')
44 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
85 // Do 4 rounds of SHA-256. w0 contains the current 4 message schedule words.
88 // computes 4 more message schedule words. w1-w3 contain the next 3 groups of 4
113 // Load the round constants into K0-K15.
149 // message scheduling. There are 4 words, so an 8-bit mask suffices.
155 // is e8mf4. We use index-load with the i8 indices {20, 16, 4, 0},
156 // loaded using the 32-bit little endian value 0x00041014.
166 addi NUM_BLOCKS, NUM_BLOCKS, -1
172 // Load the next 512-bit message block and endian-swap each 32-bit word.
186 // Do the 64 rounds of SHA-256.
196 // Repeat if more blocks remain.
225 .size K256, . - K256