Lines Matching +full:risc +full:- +full:v
1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
39 // The generated code of this file depends on the following RISC-V extensions:
40 // - RV64I
41 // - RISC-V Vector ('V') with VLEN >= 128
42 // - RISC-V Vector AES block cipher extension ('Zvkned')
43 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
50 #include "aes-macros.S"
63 // LEN32 = number of blocks, rounded up, in 32-bit words.
68 // Create a mask that selects the last 32-bit word of each 128-bit
69 // block. This is the word that contains the (big-endian) counter.
72 vmv.v.x v0, t0
74 // Load the IV into v31. The last 32-bit word contains the counter.
76 vle32.v v31, (IVP)
78 // Convert the big-endian counter into little-endian.
80 vrev8.v v31, v31, v0.t
85 vmv.v.i v16, 0
97 // the length in 32-bit words, i.e. 4 times the number of blocks.
105 vmv.v.v v24, v16
106 vrev8.v v24, v24, v0.t // Convert counters back to big-endian.
113 vle8.v v20, (INP)
115 vse8.v v20, (OUTP)
130 vrev8.v v16, v16, v0.t // Convert counters back to big-endian.
131 vse32.v v16, (IVP)