Lines Matching +full:1 +full:c000
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
38 #interrupt-cells = <1>;
43 cpu1: cpu@1 {
48 d-tlb-sets = <1>;
54 i-tlb-sets = <1>;
57 reg = <1>;
65 #interrupt-cells = <1>;
75 d-tlb-sets = <1>;
81 i-tlb-sets = <1>;
92 #interrupt-cells = <1>;
102 d-tlb-sets = <1>;
108 i-tlb-sets = <1>;
119 #interrupt-cells = <1>;
129 d-tlb-sets = <1>;
135 i-tlb-sets = <1>;
146 #interrupt-cells = <1>;
182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
185 #interrupt-cells = <1>;
196 compatible = "sifive,fu540-c000-prci";
199 #clock-cells = <1>;
202 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
210 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
216 #dma-cells = <1>;
219 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
227 compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
233 reg-io-width = <1>;
234 #address-cells = <1>;
239 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
245 #address-cells = <1>;
250 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
256 #address-cells = <1>;
261 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
266 #address-cells = <1>;
271 compatible = "sifive,fu540-c000-gem";
280 #address-cells = <1>;
285 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
294 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
303 compatible = "sifive,fu540-c000-ccache", "cache";
310 interrupts = <1>, <2>, <3>;
314 compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";