Lines Matching +full:3 +full:rd
33 #define VSX_REGISTER_XTP(rd) ((((rd) & 1) << 5) | ((rd) & 0xfe)) argument
99 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1)) in branch_taken()
148 ea = (signed short) (instr & ~3); /* sign-extend */ in dsform_ea()
286 up[0] = byterev_8(up[3]); in do_byte_reverse()
287 up[3] = tmp; in do_byte_reverse()
837 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
841 u32 val = reg->w[IS_LE ? 3 : 0]; in emulate_vsx_load()
843 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
934 i = IS_LE ? 3 - j : j; in emulate_vsx_store()
1097 "1: " op " %2,0,%3\n" \
1102 "3: li %0,%4\n" \
1105 EX_TABLE(1b, 3b) \
1117 "3: li %0,%3\n" \
1120 EX_TABLE(1b, 3b) \
1129 "3: li %0,%3\n" \
1132 EX_TABLE(1b, 3b) \
1142 op->ccval = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000); in set_cr0()
1164 struct instruction_op *op, int rd, in add_with_carry() argument
1173 op->reg = rd; in add_with_carry()
1357 unsigned int opcode, ra, rb, rc, rd, spr, u; in analyse_instr() local
1408 rd = 7 - ((word >> 23) & 0x7); in analyse_instr()
1410 rd *= 4; in analyse_instr()
1413 op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd); in analyse_instr()
1448 rd = (word >> 21) & 0x1f; in analyse_instr()
1452 op->ccval = (regs->ccr & ~(1UL << (31 - rd))) | in analyse_instr()
1453 (val << (31 - rd)); in analyse_instr()
1462 switch ((word >> 21) & 3) { in analyse_instr()
1480 rd = (word >> 21) & 0x1f; in analyse_instr()
1493 rd = (suffix >> 21) & 0x1f; in analyse_instr()
1494 op->reg = rd; in analyse_instr()
1495 op->val = regs->gpr[rd]; in analyse_instr()
1511 if (rd & trap_compare(regs->gpr[ra], (short) word)) in analyse_instr()
1515 case 3: /* twi */ in analyse_instr()
1516 if (rd & trap_compare((int)regs->gpr[ra], (short) word)) in analyse_instr()
1532 asm volatile(PPC_MADDHD(%0, %1, %2, %3) : in analyse_instr()
1538 asm volatile(PPC_MADDHDU(%0, %1, %2, %3) : in analyse_instr()
1544 asm volatile(PPC_MADDLD(%0, %1, %2, %3) : in analyse_instr()
1563 add_with_carry(regs, op, rd, ~regs->gpr[ra], imm, 1); in analyse_instr()
1570 if ((rd & 1) == 0) in analyse_instr()
1573 do_cmp_unsigned(regs, op, val, imm, rd >> 2); in analyse_instr()
1580 if ((rd & 1) == 0) in analyse_instr()
1583 do_cmp_signed(regs, op, val, imm, rd >> 2); in analyse_instr()
1588 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1593 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1627 val = DATA32(regs->gpr[rd]); in analyse_instr()
1635 val = DATA32(regs->gpr[rd]); in analyse_instr()
1643 val = DATA32(regs->gpr[rd]); in analyse_instr()
1648 op->val = regs->gpr[rd] | (unsigned short) word; in analyse_instr()
1653 op->val = regs->gpr[rd] | (imm << 16); in analyse_instr()
1657 op->val = regs->gpr[rd] ^ (unsigned short) word; in analyse_instr()
1662 op->val = regs->gpr[rd] ^ (imm << 16); in analyse_instr()
1666 op->val = regs->gpr[rd] & (unsigned short) word; in analyse_instr()
1672 op->val = regs->gpr[rd] & (imm << 16); in analyse_instr()
1679 val = regs->gpr[rd]; in analyse_instr()
1683 switch ((word >> 2) & 3) { in analyse_instr()
1693 case 3: /* rldimi */ in analyse_instr()
1729 if (rd == 0x1f || in analyse_instr()
1730 (rd & trap_compare((int)regs->gpr[ra], in analyse_instr()
1736 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb])) in analyse_instr()
1744 op->reg = rd; in analyse_instr()
1750 op->reg = rd; in analyse_instr()
1758 op->reg = rd; in analyse_instr()
1783 * 'ra' encodes the CR field number (bfa) in the top 3 bits. in analyse_instr()
1804 val = regs->gpr[rd]; in analyse_instr()
1817 op->reg = rd; in analyse_instr()
1827 op->val = regs->gpr[rd]; in analyse_instr()
1841 if ((rd & 1) == 0) { in analyse_instr()
1847 do_cmp_signed(regs, op, val, val2, rd >> 2); in analyse_instr()
1854 if ((rd & 1) == 0) { in analyse_instr()
1860 do_cmp_unsigned(regs, op, val, val2, rd >> 2); in analyse_instr()
1864 do_cmpb(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
1871 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1881 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1909 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1914 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1919 add_with_carry(regs, op, rd, ~regs->gpr[ra], 0L, in analyse_instr()
1924 add_with_carry(regs, op, rd, regs->gpr[ra], 0L, in analyse_instr()
1929 add_with_carry(regs, op, rd, ~regs->gpr[ra], -1L, in analyse_instr()
1938 add_with_carry(regs, op, rd, regs->gpr[ra], -1L, in analyse_instr()
2036 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
2041 val = regs->gpr[rd]; in analyse_instr()
2046 op->val = regs->gpr[rd] & regs->gpr[rb]; in analyse_instr()
2050 op->val = regs->gpr[rd] & ~regs->gpr[rb]; in analyse_instr()
2054 do_popcnt(regs, op, regs->gpr[rd], 8); in analyse_instr()
2058 op->val = ~(regs->gpr[rd] | regs->gpr[rb]); in analyse_instr()
2062 do_prty(regs, op, regs->gpr[rd], 32); in analyse_instr()
2066 do_prty(regs, op, regs->gpr[rd], 64); in analyse_instr()
2070 do_bpermd(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
2074 op->val = ~(regs->gpr[rd] ^ regs->gpr[rb]); in analyse_instr()
2078 op->val = regs->gpr[rd] ^ regs->gpr[rb]; in analyse_instr()
2082 do_popcnt(regs, op, regs->gpr[rd], 32); in analyse_instr()
2086 op->val = regs->gpr[rd] | ~regs->gpr[rb]; in analyse_instr()
2090 op->val = regs->gpr[rd] | regs->gpr[rb]; in analyse_instr()
2094 op->val = ~(regs->gpr[rd] & regs->gpr[rb]); in analyse_instr()
2098 do_popcnt(regs, op, regs->gpr[rd], 64); in analyse_instr()
2104 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
2111 val = regs->gpr[rd]; in analyse_instr()
2116 op->val = (signed short) regs->gpr[rd]; in analyse_instr()
2120 op->val = (signed char) regs->gpr[rd]; in analyse_instr()
2124 op->val = (signed int) regs->gpr[rd]; in analyse_instr()
2134 op->val = (regs->gpr[rd] << sh) & 0xffffffffUL; in analyse_instr()
2142 op->val = (regs->gpr[rd] & 0xffffffffUL) >> sh; in analyse_instr()
2150 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2163 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2177 op->val = regs->gpr[rd] << sh; in analyse_instr()
2185 op->val = regs->gpr[rd] >> sh; in analyse_instr()
2193 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2207 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2223 val = (signed int) regs->gpr[rd]; in analyse_instr()
2248 op->reg = rd; in analyse_instr()
2254 op->reg = rd; in analyse_instr()
2275 op->reg = rd; in analyse_instr()
2276 op->val = regs->gpr[rd]; in analyse_instr()
2320 if (!((rd & 1) || rd == ra || rd == rb)) in analyse_instr()
2325 if (!(rd & 1)) in analyse_instr()
2499 op->val = byterev_8(regs->gpr[rd]); in analyse_instr()
2509 op->val = byterev_4(regs->gpr[rd]); in analyse_instr()
2525 op->val = byterev_2(regs->gpr[rd]); in analyse_instr()
2530 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2536 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2542 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2550 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2561 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2573 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2582 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2590 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2599 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2610 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2624 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2629 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2636 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2642 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2649 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2655 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2663 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2672 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2681 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2688 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2696 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2703 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2711 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2720 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2729 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2736 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2744 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2797 if (ra >= rd) in analyse_instr()
2799 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2804 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2836 if (!((rd & 1) || (rd == ra))) in analyse_instr()
2845 switch (word & 3) { in analyse_instr()
2847 if (rd & 1) in analyse_instr()
2854 op->reg = rd + 32; in analyse_instr()
2859 case 3: /* lxssp */ in analyse_instr()
2862 op->reg = rd + 32; in analyse_instr()
2874 switch (word & 3) { in analyse_instr()
2893 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2918 op->reg = rd + 32; in analyse_instr()
2929 op->reg = rd + 32; in analyse_instr()
2935 case 3: /* stxssp with LSB of DS field = 0 */ in analyse_instr()
2940 op->reg = rd + 32; in analyse_instr()
2951 op->reg = rd + 32; in analyse_instr()
2963 switch (word & 3) { in analyse_instr()
2971 if (!(rd & 1)) in analyse_instr()
2983 rd = (suffix >> 21) & 0x1f; in analyse_instr()
2984 op->reg = rd; in analyse_instr()
2985 op->val = regs->gpr[rd]; in analyse_instr()
3000 op->reg = rd + 32; in analyse_instr()
3006 op->reg = rd + 32; in analyse_instr()
3012 op->reg = rd + 32; in analyse_instr()
3018 op->reg = rd + 32; in analyse_instr()
3032 op->reg = rd + 32; in analyse_instr()
3048 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
3061 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
3110 case 3: /* Type 11 Modified Register-to-Register */ in analyse_instr()
3120 if (ra == rd) in analyse_instr()
3157 op->reg = rd; in analyse_instr()
3323 int i, rd, nb; in emulate_loadstore() local
3407 ((regs->xer >> 3) & 0x10000000); in emulate_loadstore()
3467 rd = op->reg; in emulate_loadstore()
3479 regs->gpr[rd] = v32; in emulate_loadstore()
3482 rd = (rd + 1) & 0x1f; in emulate_loadstore()
3537 rd = op->reg; in emulate_loadstore()
3539 unsigned int v32 = regs->gpr[rd]; in emulate_loadstore()
3551 rd = (rd + 1) & 0x1f; in emulate_loadstore()