Lines Matching +full:sync +full:- +full:token
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
77 * This provides the non-bus specific accessors to MMIO. Those are PowerPC
95 /* -mprefixed can generate offsets beyond range, fall back hack */
101 __asm__ __volatile__("sync;"#insn" %0,0,%1;twi 0,%0,0;isync" \
109 __asm__ __volatile__("sync;"#insn" %1,0,%0" \
118 __asm__ __volatile__("sync;"#insn" %0,0(%1);twi 0,%0,0;isync"\
126 __asm__ __volatile__("sync;"#insn" %1,0(%0)" \
135 __asm__ __volatile__("sync;"#insn" %0,%y1;twi 0,%0,0;isync" \
143 __asm__ __volatile__("sync;"#insn" %1,%y0" \
152 __asm__ __volatile__("sync;"#insn"%U1%X1 %0,%1;twi 0,%0,0;isync"\
160 __asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \
262 * provides fairly heavy weight barriers for the non-raw versions
314 #define PCI_SET_ADDR_TOKEN(addr, token) \ argument
318 __a |= ((unsigned long)(token)) << PCI_IO_IND_TOKEN_SHIFT; \
327 * Non ordered and non-swapping "raw" accessors
496 "sync\n" \
503 "5: li %0,-1\n" \
520 "sync\n" \
522 "1: sync\n" \
647 #include <asm/io-defs.h>
672 #include <asm/io-defs.h>
825 __asm__ __volatile__ ("sync" : : : "memory"); in iosync()
828 /* Enforce in-order execution of data I/O.
855 * ioremap - map bus memory into CPU space
867 * * ioremap is the standard one and provides non-cacheable guarded mappings
918 #define PIO_MASK (FULL_IO_SIZE - 1)
935 * virt_to_phys - map virtual addresses to physical
955 * phys_to_virt - map physical address to virtual
992 return __va(address - PCI_DRAM_OFFSET); in bus_to_virt()
1009 * set multiple bits in a register using a single read-modify-write. These
1010 * macros can also be used to set a multiple-bit bit pattern using a mask,
1031 #include <asm-generic/io.h>