1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Fast SHA-1 implementation for SPE instruction set (PPC)
14 #include <asm/asm-offsets.h>
57 	stwu		r1,-128(r1);	/* create stack frame		*/ \
106 #define	R_00_15(a, b, c, d, e, w0, w1, k, off) \  argument
108 	and		rT2,b,c;	/* 1: F' = B and C 		*/ \
110 	andc		rT1,d,b;	/* 1: F" = ~B and D 		*/ \
111 	rotrwi		rT0,a,27;	/* 1: A' = A rotl 5		*/ \
112 	or		rT2,rT2,rT1;	/* 1: F = F' or F"		*/ \
113 	add		e,e,rT0;	/* 1: E = E + A'		*/ \
117 	add		e,e,rT2;	/* 1: E = E + F			*/ \
118 	and		rT1,a,b;	/* 2: F' = B and C 		*/ \
120 	andc		rT2,c,a;	/* 2: F" = ~B and D 		*/ \
122 	or		rT2,rT2,rT1;	/* 2: F = F' or F"		*/ \
123 	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \
125 	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \
126 	add		d,d,rT0;	/* 2: E = E + A'		*/ \
128 	add		d,d,rT2		/* 2: E = E + F			*/
130 #define R_16_19(a, b, c, d, e, w0, w1, w4, w6, w7, k) \  argument
131 	and		rT2,b,c;	/* 1: F' = B and C 		*/ \
132 	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \
133 	andc		rT1,d,b;	/* 1: F" = ~B and D 		*/ \
134 	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \
135 	or		rT1,rT1,rT2;	/* 1: F = F' or F"		*/ \
136 	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \
137 	add		e,e,rT1;	/* 1: E = E + F			*/ \
138 	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \
139 	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \
141 	add		e,e,rT2;	/* 1: E = E + A'		*/ \
148 	and		rT2,a,b;	/* 2: F' = B and C 		*/ \
149 	andc		rT1,c,a;	/* 2: F" = ~B and D 		*/ \
150 	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \
151 	or		rT1,rT1,rT2;	/* 2: F = F' or F"		*/ \
152 	add		d,d,rT0;	/* 2: E = E + A'		*/ \
153 	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \
154 	add		d,d,rT1		/* 2: E = E + F			*/
156 #define R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k) \  argument
157 	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \
158 	xor		rT2,b,c;	/* 1: F' = B xor C		*/ \
159 	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \
160 	xor		rT2,rT2,d;	/* 1: F = F' xor D		*/ \
161 	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \
162 	add		e,e,rT2;	/* 1: E = E + F			*/ \
163 	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \
164 	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \
166 	add		e,e,rT2;	/* 1: E = E + A'		*/ \
172 	xor		rT2,a,b;	/* 2: F' = B xor C		*/ \
174 	xor		rT2,rT2,c;	/* 2: F = F' xor D		*/ \
175 	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \
176 	add		d,d,rT2;	/* 2: E = E + F			*/ \
177 	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \
178 	add		d,d,rT0		/* 2: E = E + A'		*/
180 #define R_40_59(a, b, c, d, e, w0, w1, w4, w6, w7, k) \  argument
181 	and		rT2,b,c;	/* 1: F' = B and C		*/ \
182 	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \
183 	or		rT1,b,c;	/* 1: F" = B or C		*/ \
184 	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \
185 	and		rT1,d,rT1;	/* 1: F" = F" and D		*/ \
186 	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \
187 	or		rT2,rT2,rT1;	/* 1: F = F' or F"		*/ \
188 	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \
189 	add		e,e,rT2;	/* 1: E = E + F			*/ \
191 	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \
193 	add		e,e,rT2;	/* 1: E = E + A'		*/ \
198 	and		rT2,a,b;	/* 2: F' = B and C		*/ \
199 	or		rT0,a,b;	/* 2: F" = B or C		*/ \
201 	and		rT0,c,rT0;	/* 2: F" = F" and D		*/ \
202 	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \
203 	or		rT2,rT2,rT0;	/* 2: F = F' or F"		*/ \
204 	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \
205 	add		d,d,rT2;	/* 2: E = E + F			*/ \
206 	add		d,d,rT0		/* 2: E = E + A'		*/
208 #define R_60_79(a, b, c, d, e, w0, w1, w4, w6, w7, k) \  argument
209 	R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k)