Lines Matching +full:1 +full:f40000
16 #address-cells = <1>;
17 #size-cells = <1>;
29 #address-cells = <1>;
52 #address-cells = <1>;
53 #size-cells = <1>;
89 #address-cells = <1>;
110 #address-cells = <1>;
111 #size-cells = <1>;
128 cell-index = <1>;
151 #address-cells = <1>;
152 #size-cells = <1>;
166 #address-cells = <1>;
171 phy1: ethernet-phy@1 {
173 interrupts = <8 1>;
174 reg = <1>;
178 interrupts = <8 1>;
183 interrupts = <8 1>;
194 #address-cells = <1>;
195 #size-cells = <1>;
196 cell-index = <1>;
209 #address-cells = <1>;
231 #address-cells = <1>;
232 #size-cells = <1>;
238 #address-cells = <1>;
239 #size-cells = <1>;
271 fsl,cpm-brg = <1>;
308 #size-cells = <1>;
314 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
315 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
319 flash@1,0 {
320 #address-cells = <1>;
321 #size-cells = <1>;
323 reg = <1 0x0 0x8000000>;
325 device-width = <1>;
343 partition@7f40000 {
358 interrupts = <4 1>;
365 interrupts = <4 1>;
371 #interrupt-cells = <1>;
381 0xe000 0 0 1 &mpic 2 1
382 0xe000 0 0 2 &mpic 3 1
383 0xe000 0 0 3 &mpic 6 1
384 0xe000 0 0 4 &mpic 5 1
387 0x5800 0 0 1 &mpic 6 1
388 0x5800 0 0 2 &mpic 5 1