Lines Matching +full:write +full:- +full:1
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
117 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
121 depdi,z 1,DR2_SLOW_RET,1,%r29
132 ; Cacheline start (32-byte cacheline)
141 blr %r1,%r0 ; branch to 8-instruction sequence
145 ; Cacheline start (32-byte cacheline)
155 MTDIAG_1 (1) ; mtdiag %dr1, %r1
161 ; RDR 1 sequence
165 SFDIAG (1)
179 MTDIAG_1 (1)
275 MTDIAG_1 (1)
287 MTDIAG_1 (1)
323 MTDIAG_1 (1)
359 MTDIAG_1 (1)
371 MTDIAG_1 (1)
467 MTDIAG_1 (1)
479 MTDIAG_1 (1)
515 MTDIAG_1 (1)
549 ;* This routine moves data to the RDR's. The double-word that
556 ;* arg1 = 64-bit value to write
557 ;* %r24 - DR2 | DR2_SLOW_RET
558 ;* %r23 - original DR2 value
572 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
576 depdi,z 1,DR2_SLOW_RET,1,%r24
582 blr %r1,%r0 ; branch to 8-instruction sequence
586 ; RDR 0 write sequence
588 sync ; RDR 0 write sequence
598 ; RDR 1 write sequence
602 STDIAG (1)
610 ; RDR 2 write sequence
622 ; RDR 3 write sequence
634 ; RDR 4 write sequence
646 ; RDR 5 write sequence
658 ; RDR 6 write sequence
670 ; RDR 7 write sequence
682 ; RDR 8 write sequence
694 ; RDR 9 write sequence
706 ; RDR 10 write sequence
718 ; RDR 11 write sequence
730 ; RDR 12 write sequence
742 ; RDR 13 write sequence
754 ; RDR 14 write sequence
766 ; RDR 15 write sequence
778 ; RDR 16 write sequence
790 ; RDR 17 write sequence
802 ; RDR 18 write sequence
814 ; RDR 19 write sequence
826 ; RDR 20 write sequence
838 ; RDR 21 write sequence
850 ; RDR 22 write sequence
862 ; RDR 23 write sequence
874 ; RDR 24 write sequence
886 ; RDR 25 write sequence
898 ; RDR 26 write sequence
910 ; RDR 27 write sequence
922 ; RDR 28 write sequence
934 ; RDR 29 write sequence
946 ; RDR 30 write sequence
958 ; RDR 31 write sequence
998 ;* %r24 - original DR2 value
999 ;* %r23 - DR2 | DR2_SLOW_RET
1000 ;* %r1 - scratch
1011 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1014 depdi,z 1,DR2_SLOW_RET,1,%r29
1025 ; Start of next 32-byte cacheline
1034 blr %r1,%r0 ; branch to 8-instruction sequence
1038 ; Start of next 32-byte cacheline
1044 MTDIAG_1 (1)
1049 SFDIAG (1) ; RDR 1 read sequence
1053 MTDIAG_1 (1)
1054 STDIAG (1)
1125 MTDIAG_1 (1)
1134 MTDIAG_1 (1)
1143 MTDIAG_1 (1)
1152 MTDIAG_1 (1)
1161 MTDIAG_1 (1)
1170 MTDIAG_1 (1)
1179 MTDIAG_1 (1)
1197 MTDIAG_1 (1)
1206 MTDIAG_1 (1)
1278 MTDIAG_1 (1)
1287 MTDIAG_1 (1)
1314 MTDIAG_1 (1)
1323 MTDIAG_1 (1)
1341 ;* This routine moves data to the RDR's. The double-word that
1356 ;* %r24 - DR2 | DR2_SLOW_RET
1357 ;* %r23 - original DR2 value
1367 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1371 depdi,z 1,DR2_SLOW_RET,1,%r24
1378 blr %r1,%r0 ; branch to 8-instruction sequence
1382 ; 32-byte cachline aligned
1385 sync ; RDR 0 write sequence
1394 sync ; RDR 1 write sequence
1396 STDIAG (1)
1403 sync ; RDR 2 write sequence
1412 sync ; RDR 3 write sequence
1421 sync ; RDR 4 write sequence
1430 sync ; RDR 5 write sequence
1439 sync ; RDR 6 write sequence
1448 sync ; RDR 7 write sequence
1457 sync ; RDR 8 write sequence
1466 sync ; RDR 9 write sequence
1475 sync ; RDR 10 write sequence
1484 sync ; RDR 11 write sequence
1493 sync ; RDR 12 write sequence
1502 sync ; RDR 13 write sequence
1511 sync ; RDR 14 write sequence
1520 sync ; RDR 15 write sequence
1529 sync ; RDR 16 write sequence
1538 sync ; RDR 17 write sequence
1547 sync ; RDR 18 write sequence
1556 sync ; RDR 19 write sequence
1565 sync ; RDR 20 write sequence
1574 sync ; RDR 21 write sequence
1583 sync ; RDR 22 write sequence
1592 sync ; RDR 23 write sequence
1601 sync ; RDR 24 write sequence
1610 sync ; RDR 25 write sequence
1619 sync ; RDR 26 write sequence
1628 sync ; RDR 27 write sequence
1637 sync ; RDR 28 write sequence
1646 sync ; RDR 29 write sequence
1655 sync ; RDR 30 write sequence
1664 sync ; RDR 31 write sequence