Lines Matching +full:2 +full:hz
15 #define SNI_COUNTER0_DIV ((SNI_CLOCK_TICK_RATE / SNI_COUNTER2_DIV) / HZ)
59 * a20r platform uses 2 counters to divide the input frequency.
60 * Counter 2 output is connected to Counter 0 & 1 input.
76 #define SNI_8254_TCSAMP_COUNTER ((SNI_8254_TICK_RATE / HZ) + 255)
103 * for every 1/HZ seconds. We round off the nearest 1 MHz of master in dosample()
104 * clock (= 1000000 / HZ / 2). in dosample()
106 /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/ in dosample()
107 return (ct1 - ct0) / (500000/HZ) * (500000/HZ); in dosample()
140 r4k_ticks[2] = dosample(); in plat_time_init()
141 if (r4k_ticks[2] == r4k_ticks[0] in plat_time_init()
142 || r4k_ticks[2] == r4k_ticks[1]) in plat_time_init()
143 r4k_tick = r4k_ticks[2]; in plat_time_init()
147 + r4k_ticks[2]) / 3; in plat_time_init()
153 (int) (r4k_tick / (500000 / HZ)), in plat_time_init()
154 (int) (r4k_tick % (500000 / HZ))); in plat_time_init()
156 mips_hpt_frequency = r4k_tick * HZ; in plat_time_init()