Lines Matching +full:len +full:- +full:or +full:- +full:define
16 #include <asm/asm-offsets.h>
29 #define t0 $8
30 #define t1 $9
31 #define t2 $10
32 #define t3 $11
33 #define t4 $12
34 #define t5 $13
35 #define t6 $14
36 #define t7 $15
38 #define USE_DOUBLE
43 #define LOAD ld
44 #define LOAD32 lwu
45 #define ADD daddu
46 #define NBYTES 8
50 #define LOAD lw
51 #define LOAD32 lw
52 #define ADD addu
53 #define NBYTES 4
57 #define UNIT(unit) ((unit)*NBYTES)
59 #define ADDC(sum,reg) \
67 #define ADDC32(sum,reg) \
75 #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
86 #define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
89 #define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
100 #define src a0
101 #define sum v0
268 or t1, t2
297 or sum, sum, t0
311 * csum_partial_copy_nocheck(src, dst, len)
312 * __csum_partial_copy_kernel(src, dst, len)
318 #define src a0
319 #define dst a1
320 #define len a2 macro
321 #define sum v0
322 #define odd t8
329 #define LD_INSN 1
330 #define ST_INSN 2
331 #define LEGACY_MODE 1
332 #define EVA_MODE 2
333 #define USEROP 1
334 #define KERNELOP 2
346 #define EXC(insn, type, reg, addr) \
354 /* If loading from user or storing to user */ \
371 #define LOADK ld /* No exception */
372 #define LOAD(reg, addr) EXC(ld, LD_INSN, reg, addr)
373 #define LOADBU(reg, addr) EXC(lbu, LD_INSN, reg, addr)
374 #define LOADL(reg, addr) EXC(ldl, LD_INSN, reg, addr)
375 #define LOADR(reg, addr) EXC(ldr, LD_INSN, reg, addr)
376 #define STOREB(reg, addr) EXC(sb, ST_INSN, reg, addr)
377 #define STOREL(reg, addr) EXC(sdl, ST_INSN, reg, addr)
378 #define STORER(reg, addr) EXC(sdr, ST_INSN, reg, addr)
379 #define STORE(reg, addr) EXC(sd, ST_INSN, reg, addr)
380 #define ADD daddu
381 #define SUB dsubu
382 #define SRL dsrl
383 #define SLL dsll
384 #define SLLV dsllv
385 #define SRLV dsrlv
386 #define NBYTES 8
387 #define LOG_NBYTES 3
391 #define LOADK lw /* No exception */
392 #define LOAD(reg, addr) EXC(lw, LD_INSN, reg, addr)
393 #define LOADBU(reg, addr) EXC(lbu, LD_INSN, reg, addr)
394 #define LOADL(reg, addr) EXC(lwl, LD_INSN, reg, addr)
395 #define LOADR(reg, addr) EXC(lwr, LD_INSN, reg, addr)
396 #define STOREB(reg, addr) EXC(sb, ST_INSN, reg, addr)
397 #define STOREL(reg, addr) EXC(swl, ST_INSN, reg, addr)
398 #define STORER(reg, addr) EXC(swr, ST_INSN, reg, addr)
399 #define STORE(reg, addr) EXC(sw, ST_INSN, reg, addr)
400 #define ADD addu
401 #define SUB subu
402 #define SRL srl
403 #define SLL sll
404 #define SLLV sllv
405 #define SRLV srlv
406 #define NBYTES 4
407 #define LOG_NBYTES 2
412 #define LDFIRST LOADR
413 #define LDREST LOADL
414 #define STFIRST STORER
415 #define STREST STOREL
416 #define SHIFT_DISCARD SLLV
417 #define SHIFT_DISCARD_REVERT SRLV
419 #define LDFIRST LOADL
420 #define LDREST LOADR
421 #define STFIRST STOREL
422 #define STREST STORER
423 #define SHIFT_DISCARD SRLV
424 #define SHIFT_DISCARD_REVERT SLLV
427 #define FIRST(unit) ((unit)*NBYTES)
428 #define REST(unit) (FIRST(unit)+NBYTES-1)
430 #define ADDRMASK (NBYTES-1)
440 li sum, -1
443 * Note: dst & src may be unaligned, len may be 0
451 * If len < NBYTES use byte operations.
453 sltu t2, len, NBYTES
462 * use delay slot for fall-through
466 SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
467 beqz t0, .Lcleanup_both_aligned\@ # len < 8*NBYTES
469 SUB len, 8*NBYTES # subtract here for bgez loop
480 SUB len, len, 8*NBYTES
500 bgez len, 1b
502 ADD len, 8*NBYTES # revert len (see above)
505 * len == the number of bytes left to copy < 8*NBYTES
508 #define rem t7
509 beqz len, .Ldone\@
510 sltu t0, len, 4*NBYTES
512 and rem, len, (NBYTES-1) # rem = len % NBYTES
514 * len >= 4*NBYTES
520 SUB len, len, 4*NBYTES
532 beqz len, .Ldone\@
536 * rem = len % NBYTES
538 beq rem, len, .Lcopy_bytes\@
543 SUB len, len, NBYTES
548 bne rem, len, 1b
554 * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE
555 * because can't assume read-access to dst. Instead, use
559 * wide-issue mips processors because the code has fewer branches and
560 * more instruction-level parallelism.
562 #define bits t2
563 beqz len, .Ldone\@
564 ADD t1, dst, len # t1 is just past last byte of dst
566 SLL rem, len, 3 # rem = number of bits to keep
570 STREST(t0, -1(t1))
581 * len >= NBYTES
586 #define match rem
597 beq len, t2, .Ldone\@
598 SUB len, len, t2
604 SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter
606 and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
616 SUB len, len, 4*NBYTES
637 bne len, rem, 1b
641 beqz len, .Ldone\@
642 and rem, len, NBYTES-1 # rem = len % NBYTES
643 beq rem, len, .Lcopy_bytes\@
649 SUB len, len, NBYTES
654 bne len, rem, 1b
658 beqz len, .Ldone\@
661 /* 0 < len < NBYTES */
663 #define SHIFT_START 0
664 #define SHIFT_INC 8
666 #define SHIFT_START 8*(NBYTES-1)
667 #define SHIFT_INC -8
671 #define COPY_BYTE(N) \
673 SUB len, len, 1; \
677 beqz len, .Lcopy_bytes_done\@; \
678 or t2, t0
688 LOADBU(t0, NBYTES-2(src))
689 SUB len, len, 1
690 STOREB(t0, NBYTES-2(dst))
692 or t2, t0
722 or sum, sum, t0