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21 #include <asm-generic/pgtable-nopmd.h>
23 #include <asm-generic/pgtable-nopud.h>
25 #include <asm-generic/pgtable-nop4d.h>
30 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
32 * tables. Each page table is also a single 4K page, giving 512 (==
35 * invalid_pte_table, each pte is initialized to 0.
39 * fault address - VMALLOC_START.
43 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
48 /* PMD_SHIFT determines the size of the area a second-level page table can map */
49 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
51 #define PMD_MASK (~(PMD_SIZE-1))
54 # define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
59 #define PUD_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_TABLE_ORDER - 3))
61 #define PUD_MASK (~(PUD_SIZE-1))
62 #define PGDIR_SHIFT (PUD_SHIFT + (PAGE_SHIFT + PUD_TABLE_ORDER - 3))
66 #define PGDIR_MASK (~(PGDIR_SIZE-1))
69 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
75 * For 8kB page size we use a 3 level page tree which permits a total of
76 * 8TB of address space. Alternatively a 33-bit / 8GB organization using
79 * For 16kB page size we use a 2 level page tree which permits a total of
80 * 36 bits of virtual address space. We could add a third level but it seems
83 * For 64kB page size we use a 2 level page table tree for a total of 42 bits
88 # define PGD_TABLE_ORDER 0
89 # define PUD_TABLE_ORDER 0
94 #define PMD_TABLE_ORDER 0
97 #define PGD_TABLE_ORDER 0
99 #define PMD_TABLE_ORDER 0
105 #define PGD_TABLE_ORDER 0
108 #define PMD_TABLE_ORDER 0
111 #define PGD_TABLE_ORDER 0
113 #define PMD_TABLE_ORDER 0
116 #define PGD_TABLE_ORDER 0
119 #define PMD_TABLE_ORDER 0
145 (1UL << cpu_vmbits)) - (1UL << 32))
149 /* Load modules into 32bit-compatible segment. */
151 #define MODULES_END (FIXADDR_START-2*PAGE_SIZE)
154 #define pte_ERROR(e) \ argument
155 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
157 #define pmd_ERROR(e) \ argument
158 printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
161 #define pud_ERROR(e) \ argument
162 printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
164 #define pgd_ERROR(e) \ argument
165 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
171 * For 4-level pagetables we defines these ourselves, for 3-level the
172 * definitions are below, for 2-level the
173 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
194 return 0; in p4d_bad()
215 #define p4d_index(address) (((address) >> P4D_SHIFT) & (PTRS_PER_P4D - 1))
226 * For 3-level pagetables we defines these ourselves, for 2-level the
227 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
250 return 0; in pmd_bad()
256 return 0; in pmd_bad()
316 * Initialize a new pgd / pud / pmd table with invalid pointers.
331 * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2
332 * <--------------------------- offset ---------------------------
335 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
336 * --------------> E <-- type ---> <---------- zeroes ----------->
338 * E is the exclusive marker that is not stored in swap entries.
341 { pte_t pte; pte_val(pte) = ((type & 0x7f) << 16) | (offset << 24); return pte; } in mk_swap_pte()
343 #define __swp_type(x) (((x).val >> 16) & 0x7f)