Lines Matching +full:1 +full:- +full:1024
7 * Copyright (C) 2003-2018 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
62 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
64 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
71 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_LP_ABIL_REG()
74 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_LP_ABIL_REG()
78 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_LP_ABIL_REG()
80 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_LP_ABIL_REG()
82 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_LP_ABIL_REG()
89 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_RESULTS_REG()
92 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_RESULTS_REG()
96 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_RESULTS_REG()
98 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_RESULTS_REG()
100 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_RESULTS_REG()
107 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_EN_REG()
110 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_EN_REG()
114 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_EN_REG()
116 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_INTX_EN_REG()
118 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_EN_REG()
125 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_REG()
128 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_REG()
132 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_REG()
134 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_INTX_REG()
136 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_INTX_REG()
143 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LINKX_TIMER_COUNT_REG()
146 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LINKX_TIMER_COUNT_REG()
150 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LINKX_TIMER_COUNT_REG()
152 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_LINKX_TIMER_COUNT_REG()
154 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LINKX_TIMER_COUNT_REG()
161 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LOG_ANLX_REG()
164 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LOG_ANLX_REG()
168 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LOG_ANLX_REG()
170 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_LOG_ANLX_REG()
172 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_LOG_ANLX_REG()
179 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MISCX_CTL_REG()
182 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MISCX_CTL_REG()
186 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MISCX_CTL_REG()
188 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_MISCX_CTL_REG()
190 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MISCX_CTL_REG()
197 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_CONTROL_REG()
200 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_CONTROL_REG()
204 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_CONTROL_REG()
206 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_MRX_CONTROL_REG()
208 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_CONTROL_REG()
215 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_STATUS_REG()
218 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_STATUS_REG()
222 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_STATUS_REG()
224 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_MRX_STATUS_REG()
226 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_MRX_STATUS_REG()
233 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_STATES_REG()
236 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_STATES_REG()
240 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_STATES_REG()
242 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_RXX_STATES_REG()
244 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_STATES_REG()
251 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_SYNC_REG()
254 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_SYNC_REG()
258 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_SYNC_REG()
260 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_RXX_SYNC_REG()
262 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_RXX_SYNC_REG()
269 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_AN_ADV_REG()
272 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_AN_ADV_REG()
276 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_AN_ADV_REG()
278 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_SGMX_AN_ADV_REG()
280 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_AN_ADV_REG()
287 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_LP_ADV_REG()
290 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_LP_ADV_REG()
294 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_LP_ADV_REG()
296 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_SGMX_LP_ADV_REG()
298 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_SGMX_LP_ADV_REG()
305 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TXX_STATES_REG()
308 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TXX_STATES_REG()
312 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TXX_STATES_REG()
314 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_TXX_STATES_REG()
316 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TXX_STATES_REG()
323 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TX_RXX_POLARITY_REG()
326 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TX_RXX_POLARITY_REG()
330 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TX_RXX_POLARITY_REG()
332 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_TX_RXX_POLARITY_REG()
334 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_TX_RXX_POLARITY_REG()
344 uint64_t np:1;
345 uint64_t reserved_14_14:1;
349 uint64_t hfd:1;
350 uint64_t fd:1;
354 uint64_t fd:1;
355 uint64_t hfd:1;
359 uint64_t reserved_14_14:1;
360 uint64_t np:1;
371 uint64_t thou_xfd:1;
372 uint64_t thou_xhd:1;
373 uint64_t thou_tfd:1;
374 uint64_t thou_thd:1;
378 uint64_t thou_thd:1;
379 uint64_t thou_tfd:1;
380 uint64_t thou_xhd:1;
381 uint64_t thou_xfd:1;
392 uint64_t np:1;
393 uint64_t ack:1;
397 uint64_t hfd:1;
398 uint64_t fd:1;
402 uint64_t fd:1;
403 uint64_t hfd:1;
407 uint64_t ack:1;
408 uint64_t np:1;
421 uint64_t an_cpt:1;
422 uint64_t dup:1;
423 uint64_t link_ok:1;
425 uint64_t link_ok:1;
426 uint64_t dup:1;
427 uint64_t an_cpt:1;
440 uint64_t dbg_sync_en:1;
441 uint64_t dup:1;
442 uint64_t sync_bad_en:1;
443 uint64_t an_bad_en:1;
444 uint64_t rxlock_en:1;
445 uint64_t rxbad_en:1;
446 uint64_t rxerr_en:1;
447 uint64_t txbad_en:1;
448 uint64_t txfifo_en:1;
449 uint64_t txfifu_en:1;
450 uint64_t an_err_en:1;
451 uint64_t xmit_en:1;
452 uint64_t lnkspd_en:1;
454 uint64_t lnkspd_en:1;
455 uint64_t xmit_en:1;
456 uint64_t an_err_en:1;
457 uint64_t txfifu_en:1;
458 uint64_t txfifo_en:1;
459 uint64_t txbad_en:1;
460 uint64_t rxerr_en:1;
461 uint64_t rxbad_en:1;
462 uint64_t rxlock_en:1;
463 uint64_t an_bad_en:1;
464 uint64_t sync_bad_en:1;
465 uint64_t dup:1;
466 uint64_t dbg_sync_en:1;
473 uint64_t dup:1;
474 uint64_t sync_bad_en:1;
475 uint64_t an_bad_en:1;
476 uint64_t rxlock_en:1;
477 uint64_t rxbad_en:1;
478 uint64_t rxerr_en:1;
479 uint64_t txbad_en:1;
480 uint64_t txfifo_en:1;
481 uint64_t txfifu_en:1;
482 uint64_t an_err_en:1;
483 uint64_t xmit_en:1;
484 uint64_t lnkspd_en:1;
486 uint64_t lnkspd_en:1;
487 uint64_t xmit_en:1;
488 uint64_t an_err_en:1;
489 uint64_t txfifu_en:1;
490 uint64_t txfifo_en:1;
491 uint64_t txbad_en:1;
492 uint64_t rxerr_en:1;
493 uint64_t rxbad_en:1;
494 uint64_t rxlock_en:1;
495 uint64_t an_bad_en:1;
496 uint64_t sync_bad_en:1;
497 uint64_t dup:1;
508 uint64_t dbg_sync:1;
509 uint64_t dup:1;
510 uint64_t sync_bad:1;
511 uint64_t an_bad:1;
512 uint64_t rxlock:1;
513 uint64_t rxbad:1;
514 uint64_t rxerr:1;
515 uint64_t txbad:1;
516 uint64_t txfifo:1;
517 uint64_t txfifu:1;
518 uint64_t an_err:1;
519 uint64_t xmit:1;
520 uint64_t lnkspd:1;
522 uint64_t lnkspd:1;
523 uint64_t xmit:1;
524 uint64_t an_err:1;
525 uint64_t txfifu:1;
526 uint64_t txfifo:1;
527 uint64_t txbad:1;
528 uint64_t rxerr:1;
529 uint64_t rxbad:1;
530 uint64_t rxlock:1;
531 uint64_t an_bad:1;
532 uint64_t sync_bad:1;
533 uint64_t dup:1;
534 uint64_t dbg_sync:1;
541 uint64_t dup:1;
542 uint64_t sync_bad:1;
543 uint64_t an_bad:1;
544 uint64_t rxlock:1;
545 uint64_t rxbad:1;
546 uint64_t rxerr:1;
547 uint64_t txbad:1;
548 uint64_t txfifo:1;
549 uint64_t txfifu:1;
550 uint64_t an_err:1;
551 uint64_t xmit:1;
552 uint64_t lnkspd:1;
554 uint64_t lnkspd:1;
555 uint64_t xmit:1;
556 uint64_t an_err:1;
557 uint64_t txfifu:1;
558 uint64_t txfifo:1;
559 uint64_t txbad:1;
560 uint64_t rxerr:1;
561 uint64_t rxbad:1;
562 uint64_t rxlock:1;
563 uint64_t an_bad:1;
564 uint64_t sync_bad:1;
565 uint64_t dup:1;
589 uint64_t lafifovfl:1;
590 uint64_t la_en:1;
594 uint64_t la_en:1;
595 uint64_t lafifovfl:1;
606 uint64_t sgmii:1;
607 uint64_t gmxeno:1;
608 uint64_t loopbck2:1;
609 uint64_t mac_phy:1;
610 uint64_t mode:1;
611 uint64_t an_ovrd:1;
615 uint64_t an_ovrd:1;
616 uint64_t mode:1;
617 uint64_t mac_phy:1;
618 uint64_t loopbck2:1;
619 uint64_t gmxeno:1;
620 uint64_t sgmii:1;
631 uint64_t reset:1;
632 uint64_t loopbck1:1;
633 uint64_t spdlsb:1;
634 uint64_t an_en:1;
635 uint64_t pwr_dn:1;
636 uint64_t reserved_10_10:1;
637 uint64_t rst_an:1;
638 uint64_t dup:1;
639 uint64_t coltst:1;
640 uint64_t spdmsb:1;
641 uint64_t uni:1;
645 uint64_t uni:1;
646 uint64_t spdmsb:1;
647 uint64_t coltst:1;
648 uint64_t dup:1;
649 uint64_t rst_an:1;
650 uint64_t reserved_10_10:1;
651 uint64_t pwr_dn:1;
652 uint64_t an_en:1;
653 uint64_t spdlsb:1;
654 uint64_t loopbck1:1;
655 uint64_t reset:1;
666 uint64_t hun_t4:1;
667 uint64_t hun_xfd:1;
668 uint64_t hun_xhd:1;
669 uint64_t ten_fd:1;
670 uint64_t ten_hd:1;
671 uint64_t hun_t2fd:1;
672 uint64_t hun_t2hd:1;
673 uint64_t ext_st:1;
674 uint64_t reserved_7_7:1;
675 uint64_t prb_sup:1;
676 uint64_t an_cpt:1;
677 uint64_t rm_flt:1;
678 uint64_t an_abil:1;
679 uint64_t lnk_st:1;
680 uint64_t reserved_1_1:1;
681 uint64_t extnd:1;
683 uint64_t extnd:1;
684 uint64_t reserved_1_1:1;
685 uint64_t lnk_st:1;
686 uint64_t an_abil:1;
687 uint64_t rm_flt:1;
688 uint64_t an_cpt:1;
689 uint64_t prb_sup:1;
690 uint64_t reserved_7_7:1;
691 uint64_t ext_st:1;
692 uint64_t hun_t2hd:1;
693 uint64_t hun_t2fd:1;
694 uint64_t ten_hd:1;
695 uint64_t ten_fd:1;
696 uint64_t hun_xhd:1;
697 uint64_t hun_xfd:1;
698 uint64_t hun_t4:1;
709 uint64_t rx_bad:1;
711 uint64_t sync_bad:1;
713 uint64_t an_bad:1;
717 uint64_t an_bad:1;
719 uint64_t sync_bad:1;
721 uint64_t rx_bad:1;
732 uint64_t sync:1;
733 uint64_t bit_lock:1;
735 uint64_t bit_lock:1;
736 uint64_t sync:1;
747 uint64_t link:1;
748 uint64_t ack:1;
749 uint64_t reserved_13_13:1;
750 uint64_t dup:1;
753 uint64_t one:1;
755 uint64_t one:1;
758 uint64_t dup:1;
759 uint64_t reserved_13_13:1;
760 uint64_t ack:1;
761 uint64_t link:1;
772 uint64_t link:1;
774 uint64_t dup:1;
777 uint64_t one:1;
779 uint64_t one:1;
782 uint64_t dup:1;
784 uint64_t link:1;
796 uint64_t tx_bad:1;
800 uint64_t tx_bad:1;
812 uint64_t rxovrd:1;
813 uint64_t autorxpl:1;
814 uint64_t rxplrt:1;
815 uint64_t txplrt:1;
817 uint64_t txplrt:1;
818 uint64_t rxplrt:1;
819 uint64_t autorxpl:1;
820 uint64_t rxovrd:1;