Lines Matching +full:chip +full:- +full:relative
1 /* SPDX-License-Identifier: GPL-2.0 */
6 * _REG relative to RSET_PERF
9 /* Chip Identifier / Revision register */
91 * control register which is 16-bits wide. That way we do not have any
413 * _REG relative to RSET_TIMER
445 * _REG relative to RSET_WDT
467 * _REG relative to RSET_GPIO
561 * _REG relative to RSET_ENET
652 * _REG relative to RSET_ENETDMA
732 * _REG relative to RSET_ENETDMAC
764 * _REG relative to RSET_ENETDMAS
781 * _REG relative to RSET_ENETSW
840 * _REG relative to RSET_OHCI_PRIV
851 * _REG relative to RSET_USBH_PRIV
883 * _REG relative to RSET_USBD
996 /* Endpoint<->DMA mappings */
1003 /* Misc per-endpoint settings */
1025 * _REG relative to RSET_MPI
1028 /* well known (hard wired) chip select */
1033 /* Chip select base register */
1057 /* Chip select control register */
1139 * _REG relative to RSET_PCMCIA
1170 * _REG relative to RSET_SDRAM
1195 * _REG relative to RSET_MEMC
1208 * _REG relative to RSET_DDR
1235 * _REG relative to RSET_M2M
1263 * _REG relative to RSET_SPI
1267 #define SPI_6348_CMD 0x00 /* 16-bits register */
1276 #define SPI_6348_MSG_CTL 0x40 /* 8-bits register */
1284 #define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
1290 #define SPI_6358_CMD 0x700 /* 16-bits register */
1353 * _REG relative to RSET_MISC
1374 * _REG relative to RSET_PCIE
1423 * _REG relative to RSET_OTP