Lines Matching +full:four +full:- +full:lane
7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * contains functions called by cvmx-helper to workaround known
40 #include <asm/octeon/cvmx-helper-jtag.h>
43 * Due to errata G-720, the 2nd order CDR circuit on CN52XX pass
51 int lane; in __cvmx_helper_errata_qlm_disable_2nd_order_cdr() local
53 /* We need to load all four lanes of the QLM, a total of 1072 bits */ in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
54 for (lane = 0; lane < 4; lane++) { in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
56 * Each lane has 268 bits. We need to set in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
61 cvmx_helper_qlm_jtag_shift_zeros(qlm, 63 - 0 + 1); in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
63 cvmx_helper_qlm_jtag_shift(qlm, 67 - 64 + 1, 3); in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
65 cvmx_helper_qlm_jtag_shift_zeros(qlm, 76 - 68 + 1); in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
67 cvmx_helper_qlm_jtag_shift(qlm, 77 - 77 + 1, 1); in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
69 cvmx_helper_qlm_jtag_shift_zeros(qlm, 267 - 78 + 1); in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()