Lines Matching +full:bmips +full:- +full:cbr +full:- +full:reg
1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6368-clock.h"
4 #include "dt-bindings/reset/bcm6368-reset.h"
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 mips-hpt-frequency = <200000000>;
16 brcm,bmips-cbr-reg = <0xff400000>;
21 reg = <0>;
27 reg = <1>;
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <50000000>;
36 clock-output-names = "periph";
48 cpu_intc: interrupt-controller {
49 #address-cells = <0>;
50 compatible = "mti,cpu-interrupt-controller";
52 interrupt-controller;
53 #interrupt-cells = <1>;
57 #address-cells = <1>;
58 #size-cells = <1>;
60 compatible = "simple-bus";
63 periph_clk: clock-controller@10000004 {
64 compatible = "brcm,bcm6368-clocks";
65 reg = <0x10000004 0x4>;
66 #clock-cells = <1>;
71 reg = <0x10000008 0x4>;
72 native-endian;
75 compatible = "syscon-reboot";
81 periph_rst: reset-controller@10000010 {
82 compatible = "brcm,bcm6345-reset";
83 reg = <0x10000010 0x4>;
84 #reset-cells = <1>;
87 periph_intc: interrupt-controller@10000020 {
88 compatible = "brcm,bcm6345-l1-intc";
89 reg = <0x10000020 0x10>,
92 interrupt-controller;
93 #interrupt-cells = <1>;
95 interrupt-parent = <&cpu_intc>;
100 compatible = "brcm,bcm7038-wdt";
101 reg = <0x1000005c 0xc>;
104 clock-names = "refclk";
106 timeout-sec = <30>;
109 leds0: led-controller@100000d0 {
110 #address-cells = <1>;
111 #size-cells = <0>;
112 compatible = "brcm,bcm6358-leds";
113 reg = <0x100000d0 0x8>;
119 compatible = "brcm,bcm6345-uart";
120 reg = <0x10000100 0x18>;
122 interrupt-parent = <&periph_intc>;
126 clock-names = "refclk";
132 compatible = "brcm,bcm6345-uart";
133 reg = <0x10000120 0x18>;
135 interrupt-parent = <&periph_intc>;
139 clock-names = "refclk";
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "brcm,nand-bcm6368",
148 "brcm,brcmnand-v2.1",
150 reg = <0x10000200 0x180>,
153 reg-names = "nand",
154 "nand-cache",
155 "nand-int-base";
157 interrupt-parent = <&periph_intc>;
161 clock-names = "nand";
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "brcm,bcm6358-spi";
170 reg = <0x10000800 0x70c>;
172 interrupt-parent = <&periph_intc>;
176 clock-names = "spi";
179 reset-names = "spi";
185 compatible = "brcm,bcm6368-ehci", "generic-ehci";
186 reg = <0x10001500 0x100>;
187 big-endian;
189 interrupt-parent = <&periph_intc>;
193 phy-names = "usb";
199 compatible = "brcm,bcm6368-ohci", "generic-ohci";
200 reg = <0x10001600 0x100>;
201 big-endian;
202 no-big-frame-no;
204 interrupt-parent = <&periph_intc>;
208 phy-names = "usb";
213 usbh: usb-phy@10001700 {
214 compatible = "brcm,bcm6368-usbh-phy";
215 reg = <0x10001700 0x38>;
216 #phy-cells = <1>;
219 clock-names = "usbh";
222 reset-names = "usbh";
228 compatible = "brcm,bcm6368-rng";
229 reg = <0x10004180 0x14>;
232 clock-names = "ipsec";
235 reset-names = "ipsec";
240 #address-cells = <1>;
241 #size-cells = <1>;
242 compatible = "cfi-flash";
243 reg = <0x18000000 0x2000000>;
244 bank-width = <2>;