Lines Matching +full:cpu1 +full:- +full:start +full:- +full:addr
24 #include <asm/cpu-type.h>
27 #include <asm/smp-ops.h>
38 * CBR addr doesn't change and we can cache it.
39 * For broken SoC/Bootloader CBR addr might also be provided via DT
40 * with "brcm,bmips-cbr-reg" in the "cpus" node.
65 * load address to a non-conflicting region (e.g. via in bcm3384_viper_quirks()
71 * smp-bmips.c (boot on TP1, but enable SMP, then TP0 becomes our in bcm3384_viper_quirks()
85 * The bootloader has set up the CPU1 reset vector at in bcm63xx_fixup_cpu1()
88 * The bootloader has also set up CPU1 to respond to the wrong in bcm63xx_fixup_cpu1()
90 * Here we will start up CPU1 in the background and ask it to in bcm63xx_fixup_cpu1()
101 /* Check CPU1 status in OTP (it is usually disabled) */ in bcm6328_quirks()
131 { "brcm,bcm3384-viper", &bcm3384_viper_quirks },
132 { "brcm,bcm33843-viper", &bcm3384_viper_quirks },
154 /* Cache CBR addr before CPU/DMA setup */ in prom_init()
174 if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) in plat_time_init()
175 panic("missing 'mips-hpt-frequency' property"); in plat_time_init()
187 ioport_resource.start = 0; in plat_mem_setup()
204 for (q = bmips_quirk_list; q->quirk_fn; q++) { in plat_mem_setup()
206 q->compatible)) { in plat_mem_setup()
207 q->quirk_fn(); in plat_mem_setup()
215 u32 addr; in device_tree_init() local
228 if (of_property_read_u32(np, "brcm,bmips-cbr-reg", &addr)) in device_tree_init()
232 if (addr >= (u32)memblock_start_of_DRAM() && in device_tree_init()
233 addr < (u32)memblock_end_of_DRAM()) { in device_tree_init()
235 addr); in device_tree_init()
239 bmips_cbr_addr = (void __iomem *)addr; in device_tree_init()