Lines Matching +full:sw +full:- +full:exception
2 * Copyright (C) 2007-2009 Michal Simek <[email protected]>
3 * Copyright (C) 2007-2009 PetaLogix
7 * Copyright (c) 1995-1996 Gary Thomas <[email protected]>
12 * Low-level exception handers, MMU support, and rewrite.
15 * Copyright (c) 1998-1999 TiVo, Inc.
72 * r8 == 0 - msr instructions are implemented
73 * r8 != 0 - msr instructions are not implemented
76 msrclr r8, 0 /* clear nothing - just read msr for test */
82 is broken or non-existent */
86 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
95 bnei r11, no_fdt_arg /* No - get out of here */
99 ori r3, r0, (0x10000 - 4)
102 sw r12, r4, r11 /* addr[r4 + r11] = r12 */
105 addik r3, r3, -4 /* descrement loop */
117 ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
119 /* r2=r5+r11 - r5 contain pointer to command line */
125 addik r3, r3, -1 /* decrement loop */
135 ori r3, r0, (LMB_SIZE - 4)
138 sw r7, r4, r11 /* addr[r4 + r11] = r7 */
141 addik r3, r3, -4 /* descrement loop */
151 addik r3, r0, MICROBLAZE_TLB_SIZE -1 /* Invalidate all TLB entries */
157 addik r3, r3, -1
183 addik r11, r12, -0x1000000
185 addik r11, r12, -0x0800000
187 addik r11, r12, -0x0400000
190 addik r11, r12, -0x0200000
193 addik r11, r12, -0x0100000
197 GT4: /* r11 contains the rest - will be either 1 or 4 */
204 addik r2, r11, -0x0400000
207 addik r11, r11, -0x0100000
214 GT17: /* TLB1 is 4MB - kernel size <20MB */
218 GT20: /* TLB1 is 16MB - kernel size >20MB */
232 * TLB0 is always used - check if is not zero (r9 stores TLB0 value)
302 * the exception vectors, using a 4k real==virtual mapping.
304 /* Use temporary TLB_ID for LMB - clear this temporary mapping later */
333 addik r1, r0, init_thread_union + THREAD_SIZE - 4
349 * and change to using our exception vectors.