Lines Matching +full:fsin +full:- +full:enable
3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
30 set SREGS, -64
31 set IREGS, -128
32 set IFPREGS, -224
33 set SFPREGS, -320
34 set IFPCREGS, -332
35 set SFPCREGS, -344
36 set ICCR, -346
37 set SCCR, -348
38 set TESTCTR, -352
39 set DATA, -384
77 mov.l %d1,-(%sp)
88 link %a6,&-384
90 movm.l &0x3f3c,-(%sp)
91 fmovm.x &0xff,-(%sp)
117 ### ovfl non-maskable
125 ### unfl non-maskable
140 link %a6,&-384
142 movm.l &0x3f3c,-(%sp)
143 fmovm.x &0xff,-(%sp)
166 link %a6,&-384
168 movm.l &0x3f3c,-(%sp)
169 fmovm.x &0xff,-(%sp)
254 fsin.x DATA(%a6),%fp0
693 fmovm.x %d0,-(%sp)
736 fmov.x %fp6,-(%sp)
737 fmov.x %fp4,-(%sp)
738 fmov.x %fp2,-(%sp)
739 fmov.x %fp0,-(%sp)
803 fmovm.x %d0,-(%sp)
825 # This test will take a non-maskable overflow directly.
827 string "\tNon-maskable overflow..."
980 # This test will take a non-maskable underflow directly.
982 string "\tNon-maskable underflow..."
1045 fmov.l &0x00000200,%fpcr # enable inexact
1096 fmov.l &0x00004000,%fpcr # enable SNAN
1147 fmov.l &0x00002000,%fpcr # enable OPERR
1198 fmov.l &0x00000400,%fpcr # enable DZ
1443 mov.l %d0,-(%sp)
1444 mov.l (TESTTOP-0x80+0x0,%pc),%d0
1445 pea (TESTTOP-0x80,%pc,%d0)
1450 mov.l %d0,-(%sp)
1451 mov.l (TESTTOP-0x80+0x4,%pc),%d0
1452 pea (TESTTOP-0x80,%pc,%d0)