Lines Matching full:t1
51 csrwr t1, EXCEPTION_KS1
59 csrrd t1, LOONGARCH_CSR_PGDL
64 alsl.d t1, ra, t1, 3
66 ld.d t1, t1, 0
68 alsl.d t1, ra, t1, 3
71 ld.d t1, t1, 0
73 alsl.d t1, ra, t1, 3
75 ld.d ra, t1, 0
87 alsl.d t1, t0, ra, _PTE_T_LOG2
91 ll.d t0, t1, 0
93 ld.d t0, t1, 0
100 sc.d t0, t1, 0
103 st.d t0, t1, 0
106 bstrins.d t1, zero, 3, 3
107 ld.d t0, t1, 0
108 ld.d t1, t1, 8
110 csrwr t1, LOONGARCH_CSR_TLBELO1
114 csrrd t1, EXCEPTION_KS1
120 la_abs t1, swapper_pg_dir
127 ll.d ra, t1, 0
136 sc.d t0, t1, 0
141 st.d t0, t1, 0
144 csrrd t1, LOONGARCH_CSR_BADV
146 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
159 lu12i.w t1, _PAGE_HGLOBAL >> 12
160 and t1, t0, t1
161 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
162 or t0, t0, t1
168 addi.d t1, zero, 1
169 slli.d t1, t1, (HPAGE_SHIFT - 1)
170 add.d t0, t0, t1
175 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
176 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
181 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
182 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
185 csrrd t1, EXCEPTION_KS1
199 csrwr t1, LOONGARCH_CSR_KS1
207 csrwr t1, EXCEPTION_KS1
215 csrrd t1, LOONGARCH_CSR_PGDL
220 alsl.d t1, ra, t1, 3
222 ld.d t1, t1, 0
224 alsl.d t1, ra, t1, 3
227 ld.d t1, t1, 0
229 alsl.d t1, ra, t1, 3
231 ld.d ra, t1, 0
243 alsl.d t1, t0, ra, _PTE_T_LOG2
247 ll.d t0, t1, 0
249 ld.d t0, t1, 0
257 sc.d t0, t1, 0
260 st.d t0, t1, 0
263 bstrins.d t1, zero, 3, 3
264 ld.d t0, t1, 0
265 ld.d t1, t1, 8
267 csrwr t1, LOONGARCH_CSR_TLBELO1
271 csrrd t1, EXCEPTION_KS1
277 la_abs t1, swapper_pg_dir
284 ll.d ra, t1, 0
294 sc.d t0, t1, 0
299 st.d t0, t1, 0
302 csrrd t1, LOONGARCH_CSR_BADV
304 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
317 lu12i.w t1, _PAGE_HGLOBAL >> 12
318 and t1, t0, t1
319 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
320 or t0, t0, t1
326 addi.d t1, zero, 1
327 slli.d t1, t1, (HPAGE_SHIFT - 1)
328 add.d t0, t0, t1
333 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
334 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
340 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
341 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
344 csrrd t1, EXCEPTION_KS1
358 csrwr t1, LOONGARCH_CSR_KS1
366 csrwr t1, EXCEPTION_KS1
374 csrrd t1, LOONGARCH_CSR_PGDL
379 alsl.d t1, ra, t1, 3
381 ld.d t1, t1, 0
383 alsl.d t1, ra, t1, 3
386 ld.d t1, t1, 0
388 alsl.d t1, ra, t1, 3
390 ld.d ra, t1, 0
402 alsl.d t1, t0, ra, _PTE_T_LOG2
406 ll.d t0, t1, 0
408 ld.d t0, t1, 0
415 sc.d t0, t1, 0
418 st.d t0, t1, 0
421 bstrins.d t1, zero, 3, 3
422 ld.d t0, t1, 0
423 ld.d t1, t1, 8
425 csrwr t1, LOONGARCH_CSR_TLBELO1
429 csrrd t1, EXCEPTION_KS1
435 la_abs t1, swapper_pg_dir
442 ll.d ra, t1, 0
451 sc.d t0, t1, 0
456 st.d t0, t1, 0
459 csrrd t1, LOONGARCH_CSR_BADV
461 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
474 lu12i.w t1, _PAGE_HGLOBAL >> 12
475 and t1, t0, t1
476 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
477 or t0, t0, t1
483 addi.d t1, zero, 1
484 slli.d t1, t1, (HPAGE_SHIFT - 1)
485 add.d t0, t0, t1
490 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
491 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
497 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
498 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
501 csrrd t1, EXCEPTION_KS1
515 csrwr t1, LOONGARCH_CSR_KS1