Lines Matching +full:4 +full:kb +full:- +full:page
1 # SPDX-License-Identifier: GPL-2.0
243 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
267 default 4 if PGTABLE_4LEVEL
274 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
277 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
280 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
283 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
286 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
289 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
292 def_bool $(as-instr,hvcl 0)
299 prompt "Page Table Layout"
303 Allows choosing the page table layout, which is a combination
304 of page size and page table levels. The size of virtual memory
305 address space are determined by the page table layout.
307 config 4KB_3LEVEL
308 bool "4KB with 3 levels"
312 This option selects 4KB page size with 3 level page tables, which
315 config 4KB_4LEVEL
316 bool "4KB with 4 levels"
320 This option selects 4KB page size with 4 level page tables, which
324 bool "16KB with 2 levels"
328 This option selects 16KB page size with 2 level page tables, which
332 bool "16KB with 3 levels"
336 This option selects 16KB page size with 3 level page tables, which
340 bool "64KB with 2 levels"
344 This option selects 64KB page size with 2 level page tables, which
348 bool "64KB with 3 levels"
352 This option selects 64KB page size with 3 level page tables, which
358 string "Built-in kernel command line"
361 are provided at run-time, during boot. However, there are cases
365 When that occurs, it is possible to define a built-in command
372 Choose how the kernel will handle the provided built-in command
378 Prefer the command-line passed by the boot loader if available.
379 Use the built-in command line as fallback in case we get nothing
383 bool "Use built-in to extend bootloader kernel arguments"
385 The built-in command line will be appended to the command-
391 bool "Always use the built-in kernel command string"
393 Always use the built-in command line, even if we get one during
401 bool "Enable built-in dtb in kernel"
409 Built-in DTBs are generic enough and can be used as references.
412 string "Source file for built-in dtb"
453 bool "Multi-Processing support"
459 If you say N here, the kernel will run on uni- and multiprocessor
465 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
470 bool "Support for hot-pluggable CPUs"
481 int "Maximum number of CPUs (2-256)"
493 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
516 The page size is not necessarily 4KB. Keep this in mind
520 bool "Enable LoongArch DMW-based ioremap()"
522 We use generic TLB-based ioremap() by default since it has page
523 protection support. However, you can enable LoongArch DMW-based
530 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
535 This means WUC can only used for write-only memory regions now, so
543 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
547 -mstrict-align build parameter to prevent unaligned accesses.
550 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
553 Loongson-2K500/2K1000.
597 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
696 for architectures which are either NUMA (Non-Uniform Memory Access)