Lines Matching full:msr
125 msr tpidr_el0, x2
126 msr tpidrro_el0, x3
127 msr contextidr_el1, x4
128 msr cpacr_el1, x6
134 msr tcr_el1, x8
135 msr vbar_el1, x9
136 msr mdscr_el1, x10
138 msr sctlr_el1, x12
140 msr sp_el0, x14
144 msr osdlr_el1, x5
146 msr oslar_el1, x11
166 msr ttbr1_el1, \tmp2
183 msr ttbr1_el1, x0
296 msr ttbr1_el1, temp_pgd_phys
336 msr ttbr1_el1, swapper_ttb
433 msr ttbr1_el1, swapper_ttb
456 msr cpacr_el1, xzr // Reset cpacr_el1
458 msr mdscr_el1, x1 // access to the DCC from EL0
508 msr mair_el1, mair
509 msr tcr_el1, tcr
528 msr REG_PIRE0_EL1, x0
530 msr REG_PIR_EL1, x0
536 msr REG_TCR2_EL1, x0
543 msr REG_TCR2_EL1, tcr2