Lines Matching +full:always +full:- +full:running
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2015 - ARM Ltd
7 #include <hyp/sysreg-sr.h>
38 * _EL2 copy in sys_regs[] is always up-to-date and we don't need in __sysreg_save_vel2_state()
46 * are always trapped, ensuring that the in-memory in __sysreg_save_vel2_state()
47 * copy is always up-to-date. A small blessing... in __sysreg_save_vel2_state()
54 if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { in __sysreg_save_vel2_state()
57 if (ctxt_has_s1pie(&vcpu->arch.ctxt)) { in __sysreg_save_vel2_state()
62 if (ctxt_has_s1poe(&vcpu->arch.ctxt)) in __sysreg_save_vel2_state()
69 * bits when reading back the guest-visible value. in __sysreg_save_vel2_state()
109 * CNTHCTL_EL2 only affects EL1 when running nVHE, so in __sysreg_restore_vel2_state()
122 if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { in __sysreg_restore_vel2_state()
125 if (ctxt_has_s1pie(&vcpu->arch.ctxt)) { in __sysreg_restore_vel2_state()
130 if (ctxt_has_s1poe(&vcpu->arch.ctxt)) in __sysreg_restore_vel2_state()
180 * __vcpu_load_switch_sysregs - Load guest system registers to the physical CPU
192 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; in __vcpu_load_switch_sysregs()
200 * When running a normal EL1 guest, we only load a new vcpu in __vcpu_load_switch_sysregs()
203 * If running NV, the vcpu may transition between vEL1 and in __vcpu_load_switch_sysregs()
213 * We must restore the 32-bit state before the sysregs, thanks in __vcpu_load_switch_sysregs()
214 * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72). in __vcpu_load_switch_sysregs()
246 * __vcpu_put_switch_sysregs - Restore host system registers to the physical CPU
253 * and deferring saving system register state until we're no longer running the
258 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; in __vcpu_put_switch_sysregs()