Lines Matching full:vcpu
18 static void __sysreg_save_vel2_state(struct kvm_vcpu *vcpu) in __sysreg_save_vel2_state() argument
21 __vcpu_sys_reg(vcpu, PAR_EL1) = read_sysreg(par_el1); in __sysreg_save_vel2_state()
22 __vcpu_sys_reg(vcpu, TPIDR_EL1) = read_sysreg(tpidr_el1); in __sysreg_save_vel2_state()
24 __vcpu_sys_reg(vcpu, ESR_EL2) = read_sysreg_el1(SYS_ESR); in __sysreg_save_vel2_state()
25 __vcpu_sys_reg(vcpu, AFSR0_EL2) = read_sysreg_el1(SYS_AFSR0); in __sysreg_save_vel2_state()
26 __vcpu_sys_reg(vcpu, AFSR1_EL2) = read_sysreg_el1(SYS_AFSR1); in __sysreg_save_vel2_state()
27 __vcpu_sys_reg(vcpu, FAR_EL2) = read_sysreg_el1(SYS_FAR); in __sysreg_save_vel2_state()
28 __vcpu_sys_reg(vcpu, MAIR_EL2) = read_sysreg_el1(SYS_MAIR); in __sysreg_save_vel2_state()
29 __vcpu_sys_reg(vcpu, VBAR_EL2) = read_sysreg_el1(SYS_VBAR); in __sysreg_save_vel2_state()
30 __vcpu_sys_reg(vcpu, CONTEXTIDR_EL2) = read_sysreg_el1(SYS_CONTEXTIDR); in __sysreg_save_vel2_state()
31 __vcpu_sys_reg(vcpu, AMAIR_EL2) = read_sysreg_el1(SYS_AMAIR); in __sysreg_save_vel2_state()
41 if (vcpu_el2_e2h_is_set(vcpu)) { in __sysreg_save_vel2_state()
49 __vcpu_sys_reg(vcpu, SCTLR_EL2) = read_sysreg_el1(SYS_SCTLR); in __sysreg_save_vel2_state()
50 __vcpu_sys_reg(vcpu, TTBR0_EL2) = read_sysreg_el1(SYS_TTBR0); in __sysreg_save_vel2_state()
51 __vcpu_sys_reg(vcpu, TTBR1_EL2) = read_sysreg_el1(SYS_TTBR1); in __sysreg_save_vel2_state()
52 __vcpu_sys_reg(vcpu, TCR_EL2) = read_sysreg_el1(SYS_TCR); in __sysreg_save_vel2_state()
54 if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { in __sysreg_save_vel2_state()
55 __vcpu_sys_reg(vcpu, TCR2_EL2) = read_sysreg_el1(SYS_TCR2); in __sysreg_save_vel2_state()
57 if (ctxt_has_s1pie(&vcpu->arch.ctxt)) { in __sysreg_save_vel2_state()
58 __vcpu_sys_reg(vcpu, PIRE0_EL2) = read_sysreg_el1(SYS_PIRE0); in __sysreg_save_vel2_state()
59 __vcpu_sys_reg(vcpu, PIR_EL2) = read_sysreg_el1(SYS_PIR); in __sysreg_save_vel2_state()
62 if (ctxt_has_s1poe(&vcpu->arch.ctxt)) in __sysreg_save_vel2_state()
63 __vcpu_sys_reg(vcpu, POR_EL2) = read_sysreg_el1(SYS_POR); in __sysreg_save_vel2_state()
73 __vcpu_sys_reg(vcpu, CNTHCTL_EL2) &= ~CNTKCTL_VALID_BITS; in __sysreg_save_vel2_state()
74 __vcpu_sys_reg(vcpu, CNTHCTL_EL2) |= val; in __sysreg_save_vel2_state()
77 __vcpu_sys_reg(vcpu, SP_EL2) = read_sysreg(sp_el1); in __sysreg_save_vel2_state()
78 __vcpu_sys_reg(vcpu, ELR_EL2) = read_sysreg_el1(SYS_ELR); in __sysreg_save_vel2_state()
79 __vcpu_sys_reg(vcpu, SPSR_EL2) = read_sysreg_el1(SYS_SPSR); in __sysreg_save_vel2_state()
82 static void __sysreg_restore_vel2_state(struct kvm_vcpu *vcpu) in __sysreg_restore_vel2_state() argument
87 write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1), par_el1); in __sysreg_restore_vel2_state()
88 write_sysreg(__vcpu_sys_reg(vcpu, TPIDR_EL1), tpidr_el1); in __sysreg_restore_vel2_state()
90 write_sysreg(__vcpu_sys_reg(vcpu, MPIDR_EL1), vmpidr_el2); in __sysreg_restore_vel2_state()
91 write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2), SYS_MAIR); in __sysreg_restore_vel2_state()
92 write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2), SYS_VBAR); in __sysreg_restore_vel2_state()
93 write_sysreg_el1(__vcpu_sys_reg(vcpu, CONTEXTIDR_EL2), SYS_CONTEXTIDR); in __sysreg_restore_vel2_state()
94 write_sysreg_el1(__vcpu_sys_reg(vcpu, AMAIR_EL2), SYS_AMAIR); in __sysreg_restore_vel2_state()
96 if (vcpu_el2_e2h_is_set(vcpu)) { in __sysreg_restore_vel2_state()
101 write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2), SYS_SCTLR); in __sysreg_restore_vel2_state()
102 write_sysreg_el1(__vcpu_sys_reg(vcpu, CPTR_EL2), SYS_CPACR); in __sysreg_restore_vel2_state()
103 write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2), SYS_TTBR0); in __sysreg_restore_vel2_state()
104 write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR1_EL2), SYS_TTBR1); in __sysreg_restore_vel2_state()
105 write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR_EL2), SYS_TCR); in __sysreg_restore_vel2_state()
106 write_sysreg_el1(__vcpu_sys_reg(vcpu, CNTHCTL_EL2), SYS_CNTKCTL); in __sysreg_restore_vel2_state()
112 val = translate_sctlr_el2_to_sctlr_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2)); in __sysreg_restore_vel2_state()
114 val = translate_cptr_el2_to_cpacr_el1(__vcpu_sys_reg(vcpu, CPTR_EL2)); in __sysreg_restore_vel2_state()
116 val = translate_ttbr0_el2_to_ttbr0_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2)); in __sysreg_restore_vel2_state()
118 val = translate_tcr_el2_to_tcr_el1(__vcpu_sys_reg(vcpu, TCR_EL2)); in __sysreg_restore_vel2_state()
122 if (ctxt_has_tcrx(&vcpu->arch.ctxt)) { in __sysreg_restore_vel2_state()
123 write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2); in __sysreg_restore_vel2_state()
125 if (ctxt_has_s1pie(&vcpu->arch.ctxt)) { in __sysreg_restore_vel2_state()
126 write_sysreg_el1(__vcpu_sys_reg(vcpu, PIR_EL2), SYS_PIR); in __sysreg_restore_vel2_state()
127 write_sysreg_el1(__vcpu_sys_reg(vcpu, PIRE0_EL2), SYS_PIRE0); in __sysreg_restore_vel2_state()
130 if (ctxt_has_s1poe(&vcpu->arch.ctxt)) in __sysreg_restore_vel2_state()
131 write_sysreg_el1(__vcpu_sys_reg(vcpu, POR_EL2), SYS_POR); in __sysreg_restore_vel2_state()
134 write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR); in __sysreg_restore_vel2_state()
135 write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2), SYS_AFSR0); in __sysreg_restore_vel2_state()
136 write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2), SYS_AFSR1); in __sysreg_restore_vel2_state()
137 write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2), SYS_FAR); in __sysreg_restore_vel2_state()
138 write_sysreg(__vcpu_sys_reg(vcpu, SP_EL2), sp_el1); in __sysreg_restore_vel2_state()
139 write_sysreg_el1(__vcpu_sys_reg(vcpu, ELR_EL2), SYS_ELR); in __sysreg_restore_vel2_state()
140 write_sysreg_el1(__vcpu_sys_reg(vcpu, SPSR_EL2), SYS_SPSR); in __sysreg_restore_vel2_state()
148 * to host userspace or a different VCPU. EL1 registers only need to be
149 * switched when potentially going to run a different VCPU. The latter two
182 * @vcpu: The VCPU pointer
190 void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu) in __vcpu_load_switch_sysregs() argument
192 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; in __vcpu_load_switch_sysregs()
200 * When running a normal EL1 guest, we only load a new vcpu in __vcpu_load_switch_sysregs()
203 * If running NV, the vcpu may transition between vEL1 and in __vcpu_load_switch_sysregs()
207 if (vcpu_has_nv(vcpu)) in __vcpu_load_switch_sysregs()
216 __sysreg32_restore_state(vcpu); in __vcpu_load_switch_sysregs()
219 if (unlikely(is_hyp_ctxt(vcpu))) { in __vcpu_load_switch_sysregs()
220 __sysreg_restore_vel2_state(vcpu); in __vcpu_load_switch_sysregs()
222 if (vcpu_has_nv(vcpu)) { in __vcpu_load_switch_sysregs()
242 vcpu_set_flag(vcpu, SYSREGS_ON_CPU); in __vcpu_load_switch_sysregs()
248 * @vcpu: The VCPU pointer
254 * VCPU avoids having to save them on every exit from the VM.
256 void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu) in __vcpu_put_switch_sysregs() argument
258 struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt; in __vcpu_put_switch_sysregs()
263 if (unlikely(is_hyp_ctxt(vcpu))) in __vcpu_put_switch_sysregs()
264 __sysreg_save_vel2_state(vcpu); in __vcpu_put_switch_sysregs()
269 __sysreg32_save_state(vcpu); in __vcpu_put_switch_sysregs()
275 if (vcpu_has_nv(vcpu)) in __vcpu_put_switch_sysregs()
278 vcpu_clear_flag(vcpu, SYSREGS_ON_CPU); in __vcpu_put_switch_sysregs()