Lines Matching +full:side +full:- +full:effect
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2015 - ARM Ltd
26 // x1-x17: clobbered by macros
73 // Restore guest regs x0-x17
84 // Restore guest regs x18-x29, lr
92 // x2-x29,lr: vcpu regs
93 // vcpu x0-x1 on the stack
100 // x2-x29,lr: vcpu regs
101 // vcpu x0-x1 on the stack
112 // return address to tail call into hyp_panic. As a side effect, the
124 // x2-x29,lr: vcpu regs
125 // vcpu x0-x1 on the stack
134 // Retrieve the guest regs x0-x1 from the stack
137 // Store the guest regs x0-x1 and x4-x17
147 // Store the guest regs x18-x29, lr
175 // without an unmask-SError and isb. The ESB-instruction consumed any
178 str x2, [x1, #(VCPU_FAULT_DISR - VCPU_CONTEXT)]
184 dsb sy // Synchronize against in-flight ld/st
185 isb // Prevent an early read of side-effect free ISR